Overhead considerations of surface codes

Austin G. Fowler

Satoshi Yoshida, Shiro Tamiya, Hayata Yamasaki

Abstract The essential requirement for fault-tolerant quantum computation (FTQC) is the total protocol design to achieve a fair balance of all the critical factors relevant to its practical realization, such as the space overhead, the threshold, and the modularity. A major obstacle in realizing FTQC with conventional protocols, such as those based on the surface code and the concatenated Steane code, has been the space overhead, i.e., the required number of physical qubits per logical qubit. Protocols based on high-rate quantum low-density parity-check (LDPC) codes gather considerable attention as a way to reduce the space overhead, but problematically, the existing fault-tolerant protocols for such quantum LDPC codes sacrifice other factors. Here, we construct a new fault-tolerant protocol to meet these requirements simultaneously based on more recent progress on the techniques for concatenated codes rather than quantum LDPC codes, achieving a constant space overhead, a high threshold, and flexibility in modular architecture designs. In particular, under a physical error rate of 0.1%, our protocol reduces the space overhead to achieve the logical CNOT error rates 10 −10 and 10 −24 by more than 90% and 96%, respectively, compared to the protocol for the surface code. Furthermore, our protocol achieves the threshold of 2.5% under a conventional circuit-level error model, substantially outperforming that of the surface code. The use of concatenated codes also naturally introduces abstraction layers essential for the modularity of FTQC architectures. These results indicate that the code-concatenation approach opens a way to significantly save qubits in realizing FTQC while fulfilling the other essential requirements for the practical protocol design.

Daniel López, Eduardo R. Mucciolo, E. Novais

Hayato Goto, Yinghao Ho, Taro Kanao

Generation of logical zero states encoded with a quantum error-correcting code is the first step for fault-tolerant quantum computation but requires considerably large resource overheads in general. To reduce such overheads, we propose an efficient encoding method for the distance-three, nine-qubit surface code and show its fault tolerance. This method needs no measurement, unlike other fault-tolerant encoding methods. Moreover, this is applicable to a one-dimensional qubit array. Observing these facts, we experimentally demonstrate the logical-zero-state encoding of the surface code using a superconducting quantum computer on the cloud. We also experimentally demonstrate the suppression of fast dephasing due to intrinsic residual interactions in this machine by a dynamical decoupling technique dedicated to the qubit array. To extend this method to larger codes, we also investigate the concatenation of the surface code with itself, resulting in a distance-nine, 81-qubit code. We numerically show that fault-tolerant encoding of this large code can be achieved by appropriate error detection.

Luigi Frunzio, Shraddha Singh

Lingling Lao, B van Wee, I Ashraf +4 more

Abstract Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to ∼86%) and latency overhead (up to ∼79%).