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International Multi-Conference on Systems, Signals & Devices (SSD)

Behavioral description of quantum V and V+ gates to design quantum logic circuits

Majid Mohammadi, Mohammad Eshghi

Published Jul 1, 2008• 14 citations
Publisher

Abstract

Quantum gates which are represented by unitary matrices have potentials to implement reversible logic circuits. V and V+gates are two well known quantum gates which are used to synthesize the reversible logic circuits. In this paper we have used behavioral description of these gates, instead of unitary matrix description, to synthesize reversible logic circuits. By this method, V and V+gates are shown in the truth table form. Results show that bigger circuits with more number of gates can be synthesized using proposed method. Some benchmarks of reversible logic circuits are also optimized and compared to other works.

DOI
10.1109/ssd.2008.4632850

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Quantum gates which are represented by unitary matrices have potentials to implement reversible logic circuits. V and V+gates are two well known quantum gates which are used to synthesize the reversible logic circuits. In this paper we have used behavioral description of these gates, instead of unitary matrix description, to synthesize reversible logic circuits. By this method, V and V+gates are shown in the truth table form. Results show that bigger circuits with more number of gates can be synthesized using proposed method. Some benchmarks of reversible logic circuits are also optimized and compared to other works.
This paper addresses using quantum gates to implement binary reversible logic circuits. We propose behavioral models for well known V and V+quantum gates. Our proposed representation is used to synthesize reversible logic circuits instead of using the known unitary matrix form of quantum gates. This technique allows V and V+gates to be represented in truth table forms. Results show that our technique can be used to synthesize circuits with bigger sizes and gate counts in compare with unitary matrix form of these gates. Several reversible circuit benchmarks are optimized and compared to related works.
In order to efficiently automatically construct quantum reversible logic circuits with low cost,a novel method for quantum circuit's synthesis is proposed.Through the line topology transformation and truth table permutation,it converts an n-qubit circuit synthesis problem into single quantum circuit synthesis using traditional recursive thought.Then directly generate relevant circuit.After optimization,the quantum reversible logic circuit is synthesized finally.All 3-qubit reversible logic circuits have been synthesized by this method.The average number of EGT gates is only 6.41,and the number is down to 5.22 after optimization.Experimental results show that the number of gates to construct reversible logic circuits is less than other methods.For any n-qubit binary logic function,the number of EGT gates is less than n2n-1.Meanwhile,it voids the exponential nature of the memory or run-time complexity,and is very simple to implement in classical computer.
The power consumption in classical computers has grown to be a critical issue. Thus, quantum computers have become a promising alternative to classical computers for more processing power and lower energy consumption. Reversible gates are important for building the quantum computers. Reversible circuits have various applications, such as digital signal processing, optical computing, quantum computing, etc. The design and synthesis of reversible gates and circuits have grown in popularity and attracted the attention of many researchers. The adder and subtractor are important computation blocks for the structure of the Arithmetic Logic Unit (ALU). In this paper, a design of reversible binary half and full adders and subtractors using reversible logic gates is proposed. The TR (Thapliyal Ranganathan) and Peres gates are used to construct the reversible half adder and subtractor circuit. Meanwhile, the Double Peres Gate (DPG), Fredkin, and NOT gates are used to build the reversible 1-bit full adder and subtractor circuit. The designs are optimized in terms of number of gates, constant inputs, garbage outputs, and quantum cost. The truth table representation and the Binary Decision Diagram (BDD) synthesis method are used to represent and synthesize the circuits, respectively. The circuits are synthesized and simulated using the Verilog Hardware Description Language code and Xilinx ISE 14.7. The results show that the proposed designs achieve the lowest quantum cost in both half adder/subtractor and full adder/subtractor. As the half adder/subtractor has six quantum cost and the full adder/subtractor has nine quantum cost.
Reversible logic is expanding grounds with its applicability to various upcoming technologies and quantum computation. Numerous reversible gates has also been proposed for designing logic circuits apart of basic quantum controlled Toffoli and Fredkin gates. A comparative study and analysis of a range of reversible gates from the literature is presented in this paper to obtain an optimal solution for designing these circuits. The gates are synthesized and implemented to obtain equivalent quantum circuits and operating cost in terms of number of inputs, gate cost, quantum cost, garbage output and ancilla input. The comparison is done at two subsequent levels i.e. gates structural level and circuit design level, providing a better solution for designing logic circuits. It is calculated that, basic gates are 50% efficient at gate level and 33% at design level analysis in terms of gate cost, as compared to the most efficient gates proposed in the literature.
Reversible logic became a promising alternative to traditional circuits because of its applications in emerging technologies such as quantum computing, low-power design, DNA computing, or nanotechnologies. As a result, synthesis of the respective circuits is an intensely studied topic. However, most synthesis methods are limited, because they rely on a truth table representation of the function to be synthesized. In this paper, the authors present a synthesis approach that is based on Binary Decision Diagrams (BDDs). The authors propose a technique to derive reversible or quantum circuits from BDDs by substituting all nodes of the BDD with a cascade of Toffoli or quantum gates, respectively. Boolean functions containing more than a hundred of variables can efficiently be synthesized. More precisely, a circuit can be obtained from a given BDD using an algorithm with linear worst case behavior regarding run-time and space requirements. Furthermore, using the proposed approach, theoretical results known from BDDs can be transferred to reversible circuits. Experiments show better results (with respect to the circuit cost) and a significantly better scalability in comparison to previous synthesis approaches.