IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
Partially-parallel irregular LDPC decoder based on improved message passing schedule
Xing Li, Kazunori Shimizu, Zhen Qiu, Takeshi Ikenaga, Satoshi Goto
Abstract
In this paper, we propose a new efficient message-passing schedule for irregular LPDC code. Our approach is based on the schedule designed for regular LDPC code. We have modified the original schedule for regular LDPC code and improved it particularly for the irregular LDPC coder realization. The experimental results show that our method could achieve better performance than conventional one, and improve the converging rate as well.