Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

International Conference on Wireless Communications, Networking and Mobile Computing

Construction of LDPC Codes with Cycles Hold in Tanner Graph

Binbin Liu, Shunliang Mei, Dong Bai

Published Sep 1, 2007• 0 citations
Publisher

Abstract

This paper presents a algebraic method for constructing LDPC codes. It uses a parity-check matrix of a short LDPC code with given degree distribution as mother matrix, upon which a long LDPC code is constructed by circulant permutation matrices. The number of cycles of given length in the Tanner graph of constructed codes is equal to or less than that of the short codes. Simulation results show that the error floor of constructed LDPC codes can be suppressed to a very low level.

DOI
10.1109/wicom.2007.216

Related papers

Recursive construction of LDPC codes

Shunliang Mei

To reduce the cycles in the Tanner graph which may affect the code performance,a recursive method to construct low-density parity-check(LDPC) codes was proposed.The method used a parity-check matrix of a short LDPC code as its mother matrix upon which a long code was constructed with circulant permutation matrices.By choosing the circulant permutation matrix parameters properly,the number of cycles having a given length in the Tanner graph of the constructed long codes were equal to or less than that of the short code.Either regular or irregular LDPC codes were constructed.Simulation results show that the LDPC codes constructed by this method have very low error-floor and almost no performance degradation due to their special structure as compared with random LDPC codes.

Journal of Tsinghua University(Science and Technology)•Jan 1, 2007•0 citations

Construction of Cycle-free LDPC Codes

OU Wei-hua

The linear block code is called a binary Low Density Parity Check code if its parity-check matrix is a sparse matrix.For the features of parity-check matrix,a LDPC code can be illustrated by a Tanner graph.Cycles,especially short cycles in the Tanner graph,which lead to inefficient decoding and prevent the decoding algorithm from converging to the optimal decoding result.In this paper,we demonstrate that a detection method of short cycle presents generation algorithm of check matrix without cycle 4 and simulates the check-matrix.

Journal of Changshu Institute of Technology•Jan 1, 2011•0 citations

A new method of detecting cycles in Tanner graph of LDPC codes

Bo Li, Gang Wang, Hongjuan Yang

To improve the performance of LDPC codes, we should detect and eliminate cycles in Tanner graph of the parity-check matrix when we make LDPC codes. We improved a logic algebraic algorithm in computing entire routes between the nodes of a communication network, and found a new method of detecting cycles in Tanner graph of LDPC codes. This method applied the logic algebraic calculation rules. First transformed the parity-check matrix and then constructed the relative matrix of the Tanner graph. Through integrating and deleting rows of relative matrix and correcting some elements, this new algorithm can detect all the cycles in a Tanner graph of LDPC codes which code length is n and information bits number is k, just needing integrating and deleting n-1 times and correcting k times. The calculation steps of the algorithm is shown detailed by an (8, 4, 2) LDPC example and its correctness have been validated.

International Conference on Wireless Communications and Signal Processing (WCSP)•Nov 1, 2009•5 citations

Quasi-Cyclic Low-Density Parity-Check Codes Based on Progressive Cycle Growth Algorithm

Yuanhua Liu, Meiling Zhang, Niu Xin-Liang

Short cycles in the Tanner graph of a given LDPC code has negative effect on the performance of iterative decoding. To improve the performance, we presented an approach for constructing Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) codes whose associated Tanner graph has large girth and a small amount of short cycles. Each column block of the parity check matrix was designed by adding circulant permutation sub-matrices one after another, provided the current parity check matrix has minimal number of short cycles. The condition for the proposed QC-LDPC codes to have girth at least 6 was also analyzed. Regular and irregular QC-LDPC codes with various lengths and rates can be constructed. Simulations show that the proposed QC-LDPC codes have less short cycles and better performance than existing progressive edge growth based QC-LDPC codes.

International Conference on Instrumentation and Measurement, Computer, Communication and Control (IMCCC)•Jul 1, 2016•1 citation

구조적인 LDPC 부호의 설계 및 성능 분석

최상훈

The objective of this thesis is to develop schemes to construct algebraically structured low-density parity-check (LDPC) codes for improving their performance and memory efficiency. It is well-known that the sum-product algorithm provides optimum decoding for LDPC codes with no cycles. However, short cycles in the Tanner graph of LDPC codes may induce a serious performance degradation. Several researchers made an effort to obtain the LDPC codes with no short cycles. Quasi-cyclic LDPC (QC-LDPC) code is a type of LDPC codes, based on circulant permutation matrices. It required a smaller size of memory for encoding and/or decoding and are easier to analyze their algebraic properties than random LDPC codes. This motivates us to take an intensive interest in constructing nonbinary QC-LDPC codes without short cycles. In this thesis, we propose a construction method of nonbinary QC-LDPC codes without short cycles. We present the mathematical proof for girth and cycle properties of proposed design method. As a result, we present the constructing method for nonbinary QC-LDPC codes without short cycles and show it performs well.

•Jan 1, 2016•0 citations

A Construction Method of QC-LDPC Codes without Short Cycles

Jianwu Zhang, Chengxia Li, Jianrong Bao

Low-density Parity-check (LDPC) coding is a class of advanced channel coding techniques. To improve the performance of LDPC codes, a simple and effective method to construct QC-LDPC codes without short cycles (cycles of length four and six) is proposed. The approach is especially effective when the parity-check matrix of QC-LDPC codes is composed of circulant permutation matrices. Firstly, we analyze the shapes of the cycles in the exponent matrix, to get the required conditions of no four-cycles and six-cycles. Then we show how to construct the parity-check matrix without four-cycles and six-cycles by filling rows of the exponent matrix with arithmetic sequences. Simulation results show that the proposed codes have better performance than array codes. Though the performance of the proposed codes is not as well as random codes at higher Eb/N0, they can be applied to practical communications because of being encoded in linear time with shift registers.

International Conference on Multimedia Information Networking and Security•Nov 1, 2012•3 citations
This paper presents a algebraic method for constructing LDPC codes. It uses a parity-check matrix of a short LDPC code with given degree distribution as mother matrix, upon which a long LDPC code is constructed by circulant permutation matrices. The number of cycles of given length in the Tanner graph of constructed codes is equal to or less than that of the short codes. Simulation results show that the error floor of constructed LDPC codes can be suppressed to a very low level.
To reduce the cycles in the Tanner graph which may affect the code performance,a recursive method to construct low-density parity-check(LDPC) codes was proposed.The method used a parity-check matrix of a short LDPC code as its mother matrix upon which a long code was constructed with circulant permutation matrices.By choosing the circulant permutation matrix parameters properly,the number of cycles having a given length in the Tanner graph of the constructed long codes were equal to or less than that of the short code.Either regular or irregular LDPC codes were constructed.Simulation results show that the LDPC codes constructed by this method have very low error-floor and almost no performance degradation due to their special structure as compared with random LDPC codes.
The linear block code is called a binary Low Density Parity Check code if its parity-check matrix is a sparse matrix.For the features of parity-check matrix,a LDPC code can be illustrated by a Tanner graph.Cycles,especially short cycles in the Tanner graph,which lead to inefficient decoding and prevent the decoding algorithm from converging to the optimal decoding result.In this paper,we demonstrate that a detection method of short cycle presents generation algorithm of check matrix without cycle 4 and simulates the check-matrix.
To improve the performance of LDPC codes, we should detect and eliminate cycles in Tanner graph of the parity-check matrix when we make LDPC codes. We improved a logic algebraic algorithm in computing entire routes between the nodes of a communication network, and found a new method of detecting cycles in Tanner graph of LDPC codes. This method applied the logic algebraic calculation rules. First transformed the parity-check matrix and then constructed the relative matrix of the Tanner graph. Through integrating and deleting rows of relative matrix and correcting some elements, this new algorithm can detect all the cycles in a Tanner graph of LDPC codes which code length is n and information bits number is k, just needing integrating and deleting n-1 times and correcting k times. The calculation steps of the algorithm is shown detailed by an (8, 4, 2) LDPC example and its correctness have been validated.
Short cycles in the Tanner graph of a given LDPC code has negative effect on the performance of iterative decoding. To improve the performance, we presented an approach for constructing Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) codes whose associated Tanner graph has large girth and a small amount of short cycles. Each column block of the parity check matrix was designed by adding circulant permutation sub-matrices one after another, provided the current parity check matrix has minimal number of short cycles. The condition for the proposed QC-LDPC codes to have girth at least 6 was also analyzed. Regular and irregular QC-LDPC codes with various lengths and rates can be constructed. Simulations show that the proposed QC-LDPC codes have less short cycles and better performance than existing progressive edge growth based QC-LDPC codes.
The objective of this thesis is to develop schemes to construct algebraically structured low-density parity-check (LDPC) codes for improving their performance and memory efficiency. It is well-known that the sum-product algorithm provides optimum decoding for LDPC codes with no cycles. However, short cycles in the Tanner graph of LDPC codes may induce a serious performance degradation. Several researchers made an effort to obtain the LDPC codes with no short cycles. Quasi-cyclic LDPC (QC-LDPC) code is a type of LDPC codes, based on circulant permutation matrices. It required a smaller size of memory for encoding and/or decoding and are easier to analyze their algebraic properties than random LDPC codes. This motivates us to take an intensive interest in constructing nonbinary QC-LDPC codes without short cycles. In this thesis, we propose a construction method of nonbinary QC-LDPC codes without short cycles. We present the mathematical proof for girth and cycle properties of proposed design method. As a result, we present the constructing method for nonbinary QC-LDPC codes without short cycles and show it performs well.
Low-density Parity-check (LDPC) coding is a class of advanced channel coding techniques. To improve the performance of LDPC codes, a simple and effective method to construct QC-LDPC codes without short cycles (cycles of length four and six) is proposed. The approach is especially effective when the parity-check matrix of QC-LDPC codes is composed of circulant permutation matrices. Firstly, we analyze the shapes of the cycles in the exponent matrix, to get the required conditions of no four-cycles and six-cycles. Then we show how to construct the parity-check matrix without four-cycles and six-cycles by filling rows of the exponent matrix with arithmetic sequences. Simulation results show that the proposed codes have better performance than array codes. Though the performance of the proposed codes is not as well as random codes at higher Eb/N0, they can be applied to practical communications because of being encoded in linear time with shift registers.