A new family of counter-type Josephson-junction A/D converters using ultrafast rapid single-flux quantum (RSFQ) logic/memory elements is proposed. The converters are built in two main blocks: a low-bit differential-code A/D converter running with subterahertz clock speed and a RSFQ-logic-based digital processing unit providing digital low-pass filtering and sample rate reduction. It is shown that such converters can be treated as digital SQUIDs possessing an extremely high slew rate (up to 10/sup 11/ phi /sub 0//s) combined with flux resolution close to that of analog DC SQUIDs (up to 10/sup -6/ phi /sub 0/Hz/sup -1/2/). Several ways of implementing both main blocks to make it possible to tradeoff these parameters against converter complexity are presented and discussed.
A new family of counter-type Josephson-junction A/D converters using ultrafast rapid single-flux quantum (RSFQ) logic/memory elements is proposed. The converters are built in two main blocks: a low-bit differential-code A/D converter running with subterahertz clock speed and a RSFQ-logic-based digital processing unit providing digital low-pass filtering and sample rate reduction. It is shown that such converters can be treated as digital SQUIDs possessing an extremely high slew rate (up to 10/sup 11/ phi /sub 0//s) combined with flux resolution close to that of analog DC SQUIDs (up to 10/sup -6/ phi /sub 0/Hz/sup -1/2/). Several ways of implementing both main blocks to make it possible to tradeoff these parameters against converter complexity are presented and discussed.
Rapid Single Flux Quantum (RSFQ) Josephson-junction technology is capable of processing digital data at sub-terahertz frequencies while dissipating almost negligible power. At the present time one can routinely simulate, optimize, design, manufacture, and test an elementary RSFQ logic/memory cell consisting of dozens of Josephson junctions. Furthermore, a number of relatively complex (few hundred to few thousand Josephson junctions) digital circuits were designed and successfully tested. Moreover we know how to implement several RSFQ systems (including analog-to-digital and digital-to-analog converters, digital SQUIDs for supersensitive magnetometry, and digital autocorrelator for radioastronomy) which would far outperform their currently available and even prospective semiconductor counterparts. In order to implement more complex RSFQ systems, including high-performance digital signal processors and general purpose computers there are a number of technical problems to solve. The issues include making full use of on-chip sub-terahertz processing in conditions when inter-chip data/clock exchange speed is bound by bandwidth of the order of a few Gbps/pin. I present the current know-how of the field, and formulate the questions that need to be solved before the RSFQ technology becomes a major workhorse of high-performance computation.
We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>
Recent developments concerning the rapid single-flux-quantum (RSFQ) circuit family are reviewed. Elementary cells in this circuit family can generate, pass, memorize, and reproduce picosecond voltage pulses with a nominally quantized area corresponding to transfer of a single magnetic flux quantum across a Josephson junction. Functionally, each cell can be viewed as a combination of a logic gate and an output latch (register) controlled by clock pulses, which are physically similar to the signal pulses. Hand-shaking style of local exchange by the clock pulses enables one to increase complexity of the LSI RSFQ systems without loss of operating speed. The simplest components of the RSFQ circuitry have been experimentally tested at clock frequencies exceeding 100 GHz, and an increase of the speed beyond 300 GHz is expected as a result of using an up-to-date fabrication technology. This review includes a discussion of possible future developments and applications of this novel, ultrafast digital technology.>
Digital SQUIDs based on the single flux quantum (SFQ) logic have attractive characteristics, such as wide dynamic range and high slew rate. However, the resolution of digital SQUIDs is limited to SFQ. To realize sub-flux quantum resolution for these SQUIDs, we have adopted two types of feedback combinations: one with the SFQ input/output for a main loop and the other with a mutually coupled loop. The main loop receives direct Φ0feedback and sub-flux quantum feedback Φ0/n, where n is an integer, from the mutually coupled loop. We confirmed the correct operation of our device at a clock frequency of 1.25 GHz for a digital SQUID with a sub-Φ0flux feedback resolution of Φ0/8 from circuit simulation. The slew rate is found to be 1.56×108Φ0/s in this simulation (fc=1.25 GHz, n=8). The flux resolution for the digital SQUID shows improvement with increasing n and reached below 40 mΦ0with n=210; however the slew rate is decreased with increasing n and reached 1.22×106Φ0/swith fc=1.25 GHz and n=210.
Several ways to achieve local timing of Josephson-junction RSFQ (rapid single flux quantum) logic elements are proposed. Several examples of serial and parallel pipelined arithmetic blocks using various types of timing are suggested and their possible performance is discussed. Serial devices enable one to perform n-bit functions relatively slowly but using integrated circuits of a moderate integration scale, while parallel pipelined devices are more hardware-wasteful but promise extremely high productivity. The possible local and self-timing of RSFQ logic elements has been demonstrated, making it possible to construct digital blocks and complex devices operating at extremely high clock frequencies, limited only by logic delays of the RSFQ elements ( approximately 100 GHz for the present-day Nb technologies).>
A new family of dc-powered Josephson junction digital devices, the Rapid Single Flux Quantum (RSFQ) logic, is described. The devices use overdamped Josephson junctions and two-junction interferometers to store, pass and process the digital information presented in form of single flux quanta. We have carried out extensive numerical simulation of the dynamics of the RSFQ logic gates and of some more complex circuits including serial full adder and reversible shift register, within the standard microscopic-theory ("Werthamer") description of Josephson junctions. The minimum clock cycles of the basic RSFQ circuits turn out to be as small as 2.5 ps. The most promising ways to use the RSFQ logic circuits at the present stage of development of the Josephson junction digital technology are discussed.