Logic Operation of HTS SFQ Logic Family
Koji Tsubone, Y. Tarutani, H. Wakana +2 more
A high-Tcsuperconducting (HTS) single-flux-quantum (SFQ) logic family including an and gate, an or gate, and an inverter was designed. The circuit parameters were optimized for a Josephson junction's critical current density, which may change due to a temperature change or insufficient run-to-run reproducibility of the fabrication process. New circuit design layout rules were implemented to improve Icx uniformity. As a result, all circuits were successfully tested and show at least plusmn40% critical current density operational margins. An effect of the parasitic capacitance formed by a junction electrode and a ground plane on the operating margins of the and gate was investigated by numerical simulation. Test circuits were fabricated using YBa2Cu3O7-deltaramp-edge junction technology and were operated at temperatures higher than 30 K. Bias current margins were also measured, and they found to be close to the simulated ones.
IEEE Transactions on Applied Superconductivity•Jul 15, 2009•2 citations