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Journal of information and communication convergence engineering

Always Metastable State True Random Number Generator

Hwajeong Seo, Howon Kim

Published Sep 30, 2012• 0 citations
Publisher

Abstract

This paper presents an efficient filtering system for a metastable state-based true random number generator. To output a result with high randomness, we use loop-storage for storing the value of metastability. During the metastable state, the output value is accumulated to the storage. When the non-metastable state arises, the stored metastable value will be used for output instead of the result of the non-metastable state. As a result, we can maintain high entropy together with the original throughput.

DOI
10.6109/jicce.2012.10.3.253

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This paper presents an efficient filtering system for a metastable state-based true random number generator. To output a result with high randomness, we use loop-storage for storing the value of metastability. During the metastable state, the output value is accumulated to the storage. When the non-metastable state arises, the stored metastable value will be used for output instead of the result of the non-metastable state. As a result, we can maintain high entropy together with the original throughput.
High-speed true random number generator is a building block in the modern information security system. We propose and demonstrate an efficient high-speed true random number generator based on multiple parallel self-timed rings (STRs). To improve the security, we evaluate the randomness of the entropy source by min-entropy and exploit the information-theoretically provable Toeplitz-hashing extractor. To minimize the consumption of hardware resources of a field programmable gate array at a predetermined high throughput and maximize the throughput with the limited hardware resources, we systematically derive and investigate the dependence of the data throughput and the total consumed resources of the random number generator on the system parameters. On this basis, we make a joint optimization for the degree of parallelism of the STRs and the extraction efficiency of the extractor. A 10-Gbps true random number generator is implemented efficiently, so that the output random bits can pass all the National Institute of Standards and Technology (NIST) and Dieharder test suites.
Most hardware "true" random number generators (TRNGs) take advantage of the thermal agitation around a flip-flop metastable state. In field programmable gate arrays (FPGAs), the classical TRNG structure uses two clocks, either from a PLL or from ring oscillators, in order to sample one by the other. This creates good TRNGs albeit limited in frequency by the interference rate which cannot exceed a few Mbit/s. This article presents an architecture allowing higher bit rates while maintaining provable unconditional security. This requirement becomes stringent for secure communication applications such as the cryptographic quantum key distribution (QKD) protocols. The proposed architecture is very simple as it is based on an open loop structure without any specific component such as PLLs.
Random numbers are of vital importance in today’s world and used for example in many cryptographical protocols to secure the communication over the internet. The generators producing these numbers are Pseudo Random Number Generators (PRNGs) or True Random Number Generators (TRNGs). A subclass of TRNGs are the Quantum based Random Number Generators (QRNGs) whose generation processes are based on quantum phenomena. However, the achievable quality of the numbers generated from a practical implementation can differ from the theoretically possible. To ease this negative effect post-processing can be used, which contains the use of extractors. They extract as much entropy as possible from the original source and produce a new output with better properties. The quality and the different properties of a given output can be measured with the help of statistical tests. In our work we examined the effect of different extractors on two QRNG outputs and found that witg the right extractor we can improve their quality.
True random number generators, which output truly random numbers by extracting entropy from physical phenomena such as thermal and electronic noises, are widely used in the field of the cryptographic communication systems. We have been developing a superconductive true random number generator that can generate truly random number sequences, impossible to be predicted, by utilizing the high-speed operation and high-sensitivity of superconductive integrated circuits. In this study, we have calculated the dependences of correlation of output random bits on the generation rate. Statistical tests have been performed on the basis of the NIST statistical test suite in order to evaluate the quality of the randomness of sequences generated by the superconductive true random number generator at high generation rate. We have generated a random number sequence consisting of 3.2 M-bit at the generation rate of 30 Gbit/s using the superconductive true random number generator, fabricated by the ISTEC-SRL 2.5 kA/cm2Nb standard process. The generated random number sequences passed 13 kinds of the statistical tests in the NIST statistical test suit, although the 3 tests were not performed because of the shortage of the generated random numbers. The result sufficiently proves that a superconductive true random number generator can generate a high quality of random numbers that can be used for practical cryptographic applications, at a generation rate of up to 30 Gbit/s.
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True random number generators are essential for many applications including security and statistical simulations. A novel superconductive true random number generator is proposed based on inductor-less bistable Josephson junction circuits. The recently proposed design methodology, based on all-Josephson junctions, promises higher area efficiency and simpler circuit design. In this brief, this methodology is extended to a superconductive circuit design that extracts randomness from thermal noise present in electronic circuits. A high throughput of 16 GHz is achieved using the proposed design, with no bias or correlation in the output sequence. The quality of the generated randomness is assessed using NIST SP 800-22 statistical tests. A 100 Mb binary sequence is demonstrated to pass all 15 statistical tests using recommended parameters as per NIST guidelines. The simulation methodology, described in detail, is based on the MIT-LL SFQ5EE 10 kA/cm2 Nb standard process and open source Verilog-A model.