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International Conference on Multimedia Technology (ICMT)

Reversible logic synthesis based on a modified tabulation method

Chin-Yung Lu, Shiou-An Wang

Published Jul 1, 2011• 3 citations
Publisher

Abstract

An important property of reversible circuits is that they can reduce the energy consumption which is now a big problem for the advanced circuit design. If a circuit is reversible, it can reduce the energy consumption caused by information loss. The tabulation method is more efficient than other simplification methods for combination logic circuits. But the classical tabulation method is not directly applicable to reversible circuits because the basic logic gates, except the NOT gate, are not reversible gates. In this paper, we propose a method to solve the problem so that the tabulation method can be applied to the reversible circuit synthesis. Our algorithm provides a systematic method to simplify the reversible circuit. This can produce the resulting expression in exclusive-sum form and transform it into a final reversible circuit with lower quantum cost. Moreover, we can realize permutations to be reversible circuits with lower quantum cost and without unnecessary garbage bits. We can also convert irreversible circuits by adding qubits to make the circuits reversible. The experimental results show that the average saving in quantum cost is 15.82% compared with previous approaches.

DOI
10.1109/icmt.2011.6002229

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An important property of reversible circuits is that they can reduce the energy consumption which is now a big problem for the advanced circuit design. If a circuit is reversible, it can reduce the energy consumption caused by information loss. The tabulation method is more efficient than other simplification methods for combination logic circuits. But the classical tabulation method is not directly applicable to reversible circuits because the basic logic gates, except the NOT gate, are not reversible gates. In this paper, we propose a method to solve the problem so that the tabulation method can be applied to the reversible circuit synthesis. Our algorithm provides a systematic method to simplify the reversible circuit. This can produce the resulting expression in exclusive-sum form and transform it into a final reversible circuit with lower quantum cost. Moreover, we can realize permutations to be reversible circuits with lower quantum cost and without unnecessary garbage bits. We can also convert irreversible circuits by adding qubits to make the circuits reversible. The experimental results show that the average saving in quantum cost is 15.82% compared with previous approaches.
In order to efficiently automatically construct quantum reversible logic circuits with low cost,a novel method for quantum circuit's synthesis is proposed.Through the line topology transformation and truth table permutation,it converts an n-qubit circuit synthesis problem into single quantum circuit synthesis using traditional recursive thought.Then directly generate relevant circuit.After optimization,the quantum reversible logic circuit is synthesized finally.All 3-qubit reversible logic circuits have been synthesized by this method.The average number of EGT gates is only 6.41,and the number is down to 5.22 after optimization.Experimental results show that the number of gates to construct reversible logic circuits is less than other methods.For any n-qubit binary logic function,the number of EGT gates is less than n2n-1.Meanwhile,it voids the exponential nature of the memory or run-time complexity,and is very simple to implement in classical computer.
Reversible logic plays an important role in quantum computation, which is a promising research field. The reversible logic synthesis problem focuses on generating a reversible circuit automatically and finding the lowest cost when an output function is given. The synthesis of reversible logic circuits can be formulated as a combinatorial optimization problem. This paper proposes a new evolutionary algorithm for synthesizing reversible circuits based on Quantum-Inspired Tabu Search Algorithm (QTS). The proposed algorithm uses the QTS-based approach to find fewer gates and reduce the cost of reversible circuits. This method is simpler, has better performance in computational cost, and reduce the gate counts of reversible circuits. This paper also compares experimental results with other heuristic and evolutionary algorithms. The final outcome shows that the QTS-based approach performs much better than other algorithms.
Reversible logic; transforms logic signal in a way that allows the original input signals to be recovered from the produced outputs, has attracted great attention because of its application in diverse areas such as quantum computing, low power computing, nanotechnology, DNA computing, quantum dot cellular automata, optical computing. In this paper, we design low power binary comparators using reversible logic gates. Firstly, single bit binary reversible comparator circuits are designed using different reversible gates along with proposed gate named Newly Proposed Gate. Then, these procedures are generalized for constructing binary n-bit reversible comparator circuit. The design synthesis consists of two parts: Comparator Cell and Propagator Cell. An algorithm, based on our proposed design, shows that proposed circuit reduces overall cost and it outperforms than existing sequential comparator circuits. Also, comparing with existing tree-based comparator circuit, proposed design reduces quantum cost, garbage output and gate count in a significance level which means better improvement as cost of any quantum circuit is directly associated with quantum cost, garbage output and gate count.
In quantum computing, the synthesis of reversible circuits is an important topic. Reversible circuit synthesis is particularly challenging because the complexity grows as the number of bits increases. To date, many reversible circuit synthesis algorithms have been proposed, but most are unable to find the optima within an acceptable time. Because traditional methods only consider partial interests, the resulting cost would be more gates. This paper proposes a novel method, called Bound Oriented Algorithm, which has the ability to find the optimal solution with a high hit rate, one greater than 75% on average. Moreover, with the prediction of the optima by bound, it can reduce excess calculation to further improve efficiency. In addition, a special library containing only Toffoli gates is used, which simplifies algorithm design and is more easily converted to a common library. The experiment result shows that the proposed method performs better than other methods in terms of solution quality and time cost.
Transformation-based synthesis is a well established systematic approach to determine a circuit implementation from a reversible function specification. Due to the inherent bidirectionality of reversible circuits the basic method can be applied in a bidirectional manner. In the approaches to date, gates are added either to the input side or the output side of the circuit on each iteration. I n this paper, we introduce a new variation where gates may be added at both ends during a single iteration when this is advantageous to reducing the cost of the circuit. Experimental results show the advantage of the new approach over previous transformation-based synthesis methods and that the additional computation is justified by the possibility of improved circuit costs.
In the recent years reversible logic circuits have gained a remarkable interest in the light of advancements made in quantum computation. The promise of theoretically zero power consumption is a major driving force for researchers to develop circuits using this logic. Synthesis of reversible logic and generating reversible logic circuit automatically with lower cost always has been a challenging task as reducing the search space is one of the major issues in the synthesis process using permutation. In this work, we proposed an Adaptive Genetic Algorithm (AGA) for synthesizing reversible logic circuits. NCT (NOT, CNOT, Toffoli) gate based library has been considered for synthesis of reversible logic circuits (RLC). The proposed algorithm produces a cascade of Toffoli gates for a given reversible specification of a circuit. Comparison of experimental results for several benchmark circuits shows that proposed evolutionary algorithm enables optimal or near-optimal solutions with lesser Gate Counts.