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Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Constructing Steane code fault-tolerant gates

Austin G. Fowler, Simon J. Devitt, Lloyd C. L. Hollenberg

Published Feb 23, 2005• 0 citations
Publisher

Abstract

We construct fault-tolerant approximations of rotation gates required by Shor's algorithm using only fault-tolerant gates that can be applied to the 7-qubit Steane code. A general scaling law of how rapidly these fault-tolerant approximations converge to arbitrary single-qubit gates is also determined.
DOI
10.1117/12.583421

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We present a method for constructing optimal fault-tolerant approximations of arbitrary unitary gates using an arbtrary discrete universal gate set. The method presented is numerical and scales exponentially with the number of gates used in the approximation, however, for the specific case of arbitrary single-qubit gates and the fault-tolerant gates permitted by the 7-qubit Steane code, it is shown that the longest practical gates sequences can be found. We also analyse the practicality of the fault-tolerant approximations of the phase rotation gates used in Shor’s algorithm and find that simple non-fault-tolerant phase rotations are more robust for realistic error rates. A general scaling law of how rapidly these fault-tolerant approximations converge to arbitrary single-qubit gates is also determined. In large-scale quantum computation, every qubit of data is encoded across multiple physical qubits to form a logical qubit permitting quantum error correction
We present a simple method for constructing optimal fault-tolerant approximations of arbitrary unitary gates using an arbitrary discrete universal gate set. The method presented is numerical and scales exponentially with the number of gates used in the approximation. However, for the specific case of arbitrary single-qubit gates and the fault-tolerant gates permitted by the concatenated 7-qubit Steane code, we find gate sequences sufficiently long and accurate to permit the fault-tolerant factoring of numbers thousands of bits long. A general scaling law of how rapidly these fault-tolerant approximations converge to arbitrary single-qubit gates is also determined.
We present a simple method for constructing optimal fault-tolerant approximations of arbitrary unitary gates using an arbitrary discrete universal gate set. The method presented is numerical and scales exponentially with the number of gates used in the approximation. However, for the specific case of arbitrary single-qubit gates and the fault-tolerant gates permitted by the concatenated 7-qubit Steane code, we find gate sequences sufficiently long and accurate to permit the fault-tolerant factoring of numbers thousands of bits long. A general scaling law of how rapidly these fault-tolerant approximations converge to arbitrary single-qubit gates is also determined.
Fault-tolerant logical operations for qubits encoded by Calderbank-Shor-Steane codes are discussed, with emphasis on methods that apply to codes of high rate, encoding kkk qubits per block with k>1k>1k>1. It is shown that the logical qubits within a given block can be prepared by a single recovery operation in any state whose stabilizer generator separates into XXX and ZZZ parts. Optimized methods to move logical qubits around and to achieve controlled-NOT and Toffoli gates are discussed. It is found that the number of time steps required to complete a fault-tolerant quantum computation is the same when k>1k>1k>1 as when k=1k=1k=1.
Fault-tolerant quantum computation using quantum error-correcting codes requires fault-tolerant constructions of nontransversal gates. Shor proposed a fault-tolerant construction of a nontransversal gate, i.e., the Toffoli gate for a family of the Calderbank-Shor-Steane codes which has even-weight stabilizer generators and odd-weight logical operators. In fact, as shown in this paper, error propagations in the ancilla preparation of Shor's construction lead to logical errors. This work provides a solution to this problem through the insertion of bit flip error correction. Finally, error rates of a modified construction are evaluated with use of the concatenated Steane codes, and the same accuracy threshold as transversal gates is obtained in cases where ancillary systems can be prepared just in time.
Typical circuit implementations of Shor's algorithm involve controlled rotation gates of magnitude $\ensuremath{\pi}∕{2}^{2L}$ where LLL is the binary length of the integer NNN to be factored. Such gates cannot be implemented exactly using existing fault-tolerant techniques. Approximating a given controlled $\ensuremath{\pi}∕{2}^{d}$ rotation gate to within $\ensuremath{\delta}=O(1∕{2}^{d})$ currently requires both a number of qubits and a number of fault-tolerant gates that grows polynomially with ddd. In this paper we show that this additional growth in space and time complexity would severely limit the applicability of Shor's algorithm to large integers. Consequently, we study in detail the effect of using only controlled rotation gates with ddd less than or equal to some dmax{d}_{\mathrm{max}}dmax​. It is found that integers up to length Lmax=O(4dmax){L}_{\mathrm{max}}=O({4}^{{d}_{\mathrm{max}}})Lmax​=O(4dmax​) can be factored without significant performance penalty implying that the cumbersome techniques of fault-tolerant computation only need to be used to create controlled rotation gates of magnitude $\ensuremath{\pi}∕64$ if integers thousands of bits long are desired factored. Explicit fault-tolerant constructions of such gates are also discussed.