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IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Multiple-Vote Symbol-Flipping Decoder for Nonbinary LDPC Codes

Francisco García-Herrero, Erbao Li, David Declercq, Javier Valls

Published Feb 4, 2014• 14 citations
Publisher

Abstract

A multiple-vote symbol-flipping (MV-SF) decoding algorithm for nonbinary low-density parity-check (NB-LDPC) codes is proposed in this paper. Our algorithm improves the generalized bit-flipping algorithm (GBFDA) by considering the multiplicity of the candidates at the check-node output, to perform a more accurate symbol-flipping decision at the variable node update. The MV-SF algorithm greatly improves the frame error rate performance of GBFDA and approaches the performance of the best state-of-the-art decoders [extended min-sum and min-max (Min–Max)] with lower complexity. For a$(N=837,K=723)$NB-LDPC code over GF(32), the decoder derived from the proposed algorithm can reach a throughput higher than 500 Mb/s and a coding gain of 0.44 dB compared with the most efficient GBFDA architecture with only twice the silicon area. Our architecture has 27% efficiency gain compared with the best Min–Max architecture found in the literature, with a performance loss of just 0.21 dB at frame error rate$10^{-4}$.

DOI
10.1109/tvlsi.2013.2292900

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Based on the symbol-flipping algorithm with multiple-votes (MV-SF), this paper presents two simplified algorithms, symbol flipping with truncated and multiple votes (T-MV-SF) and symbol flipping with simplified and multiple votes (S-MV-SF), for nonbinary low-density parity-check(NB-LDPC) codes. Unlike previous symbol-flipping based algorithms (SFBAs), the T(S)-MV-SF uses the truncated voting information in each check and variable node update. The proposed algorithms also approximate the sorting function in each check update. Therefore, their complexity and memory consumption are remarkably reduced as compared with existing SFBAs. Furthermore, we introduce several parameters to compensate the information loss caused by the truncated voting information. After optimizing all the parameters, the proposed algorithms even have better performance than the MV-SF. As compared with the MV-SF, the maximum performance gain among all numerical examples is about 0.11 dB for the S-MV-SF on the (63, 37) code. The T-MV-SF has the largest reduction of the computational complexity on the (255, 175) code, which is about 80% of the complexity of the MV-SF. Moreover, the performance of the T-MV-SF is better than the MV-SF on the (255, 175) code. As a result, the proposed algorithms can effectively balance the error performance and complexity for decoding of NB-LDPCs.
A novel decoding algorithm for non-binary low density parity check (NB-LDPC) codes is proposed. The algorithm builds on the recently designed parallel symbol-flipping decoding (PSFD) algorithm and combines a technique of error estimation and a method of multiple voting levels from each unsatisfied check-sum to the corresponding variable nodes. Simulations results, performed on a number of NB-LDPC codes of various lengths and column weights constructed using several methods, show that the new algorithm not only avoids using code-dependent voting threshold but also improves the error rate performance of the PSFD algorithm, particularly for low column weight parity-check matrices.
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We propose a multiple-voting-based joint detection-decoding algorithm for nonbinary low-density parity-check (LDPC)-coded modulation systems. This algorithm is inspired from the reliability-based JDD algorithm for nonbinary LDPC-coded modulation systems, that has been proposed recently, in which the accumulated reliability of symbols based on one-step majority-logic decoding algorithm and the Chase-like local list decoding algorithm are used. However, the reliability-based JDD algorithm still has a significant performance degradation of at least 1 dB with low column weight (dv≤4). In order to reduce the performance degradation with low column weight, the proposed algorithm allows unfixed number of variable nodes to pass two symbols to the associated check node, in contrast with the reliability-based JDD algorithm, which allows only one variable node to pass two symbols to check node, when updating variable-to-check messages. Moreover, the votes are weighted differently according to the components of the list in the check-sum computation. Simulations show that the proposed algorithm yields better performance with low column weight, while still maintaining the low complexity feature.