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Physical Review Letters

Scalable Quantum Processor with Trapped Electrons

Giacomo Ciaramicoli, Irene Marzoli, P. Tombesi

Published Jun 30, 2003• 69 citations
Publisher

Abstract

A quantum computer can be implemented by trapping electrons in vacuum within an innovative confining structure. Universal processing is realized by controlling the Coulomb interaction and applying electromagnetic pulses. This system offers scalability, high clock speed, and low decoherence.
DOI
10.1103/physrevlett.91.017901

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A quantum computer is an information processing systems that utilizes invertible logic elements to perform reversible logic operations. It can also perform irreversible logic operations. Thus, in principle, it can compute the information transformation rule of any physical system for which the rules are known. A quantum computer can be designed to perform parallel computation on a massive scale, and therefore can have fast execution time. The basic structure of a quantum computer includes 1) a quantum register, or a configuration of quantum-mechanical energy states to store quantum bits (qubits) of information, 2) a quantum processor designed to induce quantum mechanical interactions between any arbitrary pair of qubits to perform a specified logic operations. 3) a quantum bus or network for transferring qubits from the registers to the processor and vice versa, and 4) a physical mechanisms for non-destructive measurements on the qubits. Quantum mechanical systems with the potential for realizing quantum computers include ion-trap quantum computers, cavity quantum electrodynamics quantum computers, photon-trap quantum computers, nuclear magnetic resonance quantum computers, and superconducting quantum computers. Decoherence [1 ,2] possesses the greatest challenge to the practical realization of quantum computers, because it causes the collapse of the quantum superposition states that contain the vital results of qubit manipulations. Decoherence processes are measurement-induced, noise-induced, and environment-induced [3] . Schemes to correct or circumvent the detrimental effects of decoherence in quantum processors fall into active error-correction schemes, and passive error-correction schemes [4]. Active error-correction schemes are designed to detect and correct for errors during computation. Algorithmic fault-tolerant computing [5, 6] is the most promising active-error correction scheme. In fault-tolerant computing, ancillary qubits are encoded into data blocks of the quantum registers. They are then used to detect errors. Once detected appropriate error-correction algorithms are then employed to rectify the errors. The implementation of fault-tolerant quantum computing has been hampered by the lack of practical universal set of quantum gates that can process an encoded data without propagating or introducing additional errors. Passive-error correction schemes [7] attempt to finding Hilbert subspaces that are intrinsically free of decoherence effects [8]. The key to quantum computing in such a decoherence-free subspace is the identification of mechanisms that can effect quantum mechanical interactions between the decoherence-free states without taking the system out of the decoherence-free environment. The challenge is to identify and employ physical processes that can achieve these goals.
This paper presents a comprehensive review of quantum computing and the technological foundations of quantum processors. Quantum computing represents a transformative computational paradigm that leverages the fundamental principles of quantum mechanics—such as superposition, entanglement, and quantum interference—to solve complex problems that are intractable for classical computers. At the core of this paradigm lies the quantum processor, a specialized hardware system designed to initialize, control, and measure quantum bits (qubits) through precise gate operations and coherent interactions. The survey examines the essential theoretical concepts underlying quantum computation and provides a structured comparison of leading quantum processor platforms. Prominent architectures, including superconducting circuits, trapped-ion systems, and photonic implementations, are analyzed in terms of their physical mechanisms, scalability, coherence properties, and engineering challenges. Each platform offers distinct advantages and faces specific technical limitations related to noise, error correction, and fabrication complexity. In addition to reviewing hardware developments, this study highlights key obstacles in advancing quantum processors toward large-scale, fault-tolerant systems. Issues such as qubit stability, error mitigation, thermal management, and system integration are discussed to present a realistic perspective on current progress. Performance indicators including gate fidelity, coherence time, connectivity, and scalability are used to compare architectural approaches. The objective of this paper is to provide a clear and organized synthesis of recent advancements in quantum computing hardware, thereby offering researchers and practitioners a foundational reference to support continued innovation and development in this rapidly evolving field.
A quantum machine may solve some complex problems that are intractable for even the most powerful classical computers. By exploiting quantum superposition and entanglement phenomena, quantum algorithms can achieve from polynomial to exponential speed up when compared to their best classical counterparts. A quantum computer will be a part of a heterogeneous, multi-core computer in which a classical processor will interact with several accelerators such as FPGAs, GPUs and also a quantum co-processor. Figure 1 shows the different layers of the quantum computer system stack [1]. Building such a quantum system requires contributions from different fields such as physics, electronics, computer science and computer engineering for addressing the following challenges: i) build scalable quantum chips integrating qubits with long coherence times and high-fidelity operations, ii) develop classical control electronics at possibly cryogenic temperatures and iii) create the microarchitecture as well as the software for quantum computation.
A crucial requirement for scalable quantum-information processing is the realization of multiple-qubit quantum gates. Universal multiple-qubit gates can be implemented by a set of universal single qubit gates and any one kind of two-qubit gate, such as a controlled-NOT (CNOT) gate. Semiconductor quantum dot qubits are a leading approach for the physical implementation of quantum computation, due to their potential for large-scale integration. Two-qubit gate operations have been so far only demonstrated in individual electron spin-based quantum dot systems. Due to the relatively short de-coherence time, charge qubits in quantum dots are generally considered to be inferior for going beyond single qubit level. Here, we demonstrate the benchmarking CNOT gate in two capacitively coupled charge qubits, each consisting of an electron confined in a GaAs/AlGaAs double quantum dot. Owing to the strong inter-qubit coupling strength, gate operations with a clock speed up to 5GHz has been realized. A processing tomography shows encouragingly that the universal two-qubit gate operations have comparable fidelities to that of spin-based two-qubit gates. Our results suggest that semiconductor charge qubits have a considerable potential for scalable quantum computing and may stimulate the use of long-range Coulomb interaction for coherent quantum control in other devices.