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Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Single-flux-quantum logic

T. Van Duzer

Published Mar 1, 1992• 1 citation
Publisher

Abstract

ABSTRACT This paper reviews the several families of single-flux-quantum logic that haveappeared in the literature as well as a new one designed in our Laboratory. Some ofthese have been evaluated in full-adder circuits and found to have approximately the same latency (time between input and output) as a voltage-state circuit. It is pointed out that the throughput of single-flux-quantum circuits can be much higherthan with voltage-state circuits because of a much shorter reset time. The applica-tions for these circuits are greatest in data-independent computation such as signalprocessing. The prospects and problems for these kinds of circuits are discussed bothfor low- and high-temperature superconductors. 1. LOGIC FAMILIES The several families of single-flux-quantum logic that have been reported can be divided into two groups. One type transfers clock current from one branch of acircuit to another and typically has a three-phase clock. The other type of flux quantum logic employs single-flux-quantum pulses that propagate between gates to rep-resent logic signals. The clock also consists of pulses, and they can be generatedon-chip.

DOI
10.1117/12.56685

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ABSTRACT This paper reviews the several families of single-flux-quantum logic that haveappeared in the literature as well as a new one designed in our Laboratory. Some ofthese have been evaluated in full-adder circuits and found to have approximately the same latency (time between input and output) as a voltage-state circuit. It is pointed out that the throughput of single-flux-quantum circuits can be much higherthan with voltage-state circuits because of a much shorter reset time. The applica-tions for these circuits are greatest in data-independent computation such as signalprocessing. The prospects and problems for these kinds of circuits are discussed bothfor low- and high-temperature superconductors. 1. LOGIC FAMILIES The several families of single-flux-quantum logic that have been reported can be divided into two groups. One type transfers clock current from one branch of acircuit to another and typically has a three-phase clock. The other type of flux quantum logic employs single-flux-quantum pulses that propagate between gates to rep-resent logic signals. The clock also consists of pulses, and they can be generatedon-chip.
This paper reviews the several families of single-flux-quantum logic that have appeared in the literature as well as a new one designed in our Laboratory. Some of these have been evaluated in full-adder circuits and found to have approximately the same latency (time between input and output) as a voltage-state circuit. It is pointed out that the throughput of single-flux-quantum circuits can be much higher than with voltage-state circuits because of a much shorter reset time. The applications for these circuits are greatest in data-independent computation such as signal processing. The prospects and problems for these kinds of circuits are discussed both for low- and high-temperature superconductors.
Three digital logic families that can be made using nonhysteretic Josephson junctions (potentially the only kind of Josephson device realizable with superconductors having high transition temperatures) are analyzed. These logic families utilize magnetic flux-transfer, and are characterized by very low power dissipation. Rapid single flux quantum (RSFQ) and phase-mode logic are both based on pulse propagation. The quantum flux parametron (QFP) logic family is based on current latching. Simulations of RSFQ, Phase-Mode, and QFP logic families using high-T/sub c/ junction parameters are presented to demonstrate the compatibility of these logic families with the perovskite superconductors. The operation of these logic families is analyzed, and the advantages and disadvantages of each are discussed.
A new type of single flux quantum logic gate is proposed, which can perform unilateral propagation of signal without using three-phase clock. This gate is designed to be built with bridge-type Josephson junctions. A basic logic gate consists of two one-junction interferometers coupled by superconducting interconnecting lines, and the logical states are represented by zero or one quantized fluxoid in one of one-junction interferometers. The bias current of the unequal magnitude to each of the two one-junction interferometers results in unilateral signal flow. By adjusting design parameters such as the ratio of the critical current of Josephson junctions and the inductances, circuits with the noise immunity of greater than 50% with respect to the bias current have been designed. Three cascaded gates were modeled and simulated on a computer, and the unilateral signal flow was confirmed. The simulation also shows that a switching delay about 2 picoseconds is feasible.
We report on a voltage-state logic family based on shunted Josephson junctions and on the Rapid Single Flux Quantum (RSFQ) concept. Storing information in a voltage-state form makes this Multi-Flux-Quantum Logic (MFQL) easier to match to complementary metal-oxide semiconductor (CMOS) circuits. The switching of MFQL element between the voltage and zero-voltage states takes a minimum of two SFQ pulses, and the switching time of this logic is comparable to that of RSFQ logic. The key logic element is an inverter in the form of an asymmetric interferometer, and the underlying idea is to use a separate superconducting wire to supply a standard dc output voltage for the elements. The asymmetric interferometer, directly coupled to the other elements, is actually a Josephson junction based three-terminal device or transistor. Elements such as NOT, OR, NOR, XOR, XNOR, a toggle flip-flop, and an RS trigger have been simulated, and show margins better than /spl plusmn/24%. The performance of this logic with current circuit fabrication technologies is also discussed.
We are introducing a new subfamily of rapid single-flux-quantum (RSFQ) digital cells, based on a single B flip-flop template. The template can be considered as an SFQ flip-flop with up to 4 inputs and 6 outputs. Each input SFQ pulse can change the flip-flop's internal state. Each output presents (in the form of SFQ pulses a specific logic function of the initial state of the cell and input signals. Simple connection of various inputs and/or outputs, combined with shortening or opening of certain branches of the template allows one to implement a variety of RSFQ cells with wide margins. Of these various RSFQ cells, we have designed and successfully tested the T1 cell (asynchronous toggle flip-flop with synchronous destructive readout), single-bit full adder, and single-bit stage of an up-down counter. Experimentally measured margins for dc power supply voltage for these circuits were /spl plusmn/24%, /spl plusmn/24%, and /spl plusmn/17%, respectively.>
Recent developments concerning the rapid single-flux-quantum (RSFQ) circuit family are reviewed. Elementary cells in this circuit family can generate, pass, memorize, and reproduce picosecond voltage pulses with a nominally quantized area corresponding to transfer of a single magnetic flux quantum across a Josephson junction. Functionally, each cell can be viewed as a combination of a logic gate and an output latch (register) controlled by clock pulses, which are physically similar to the signal pulses. Hand-shaking style of local exchange by the clock pulses enables one to increase complexity of the LSI RSFQ systems without loss of operating speed. The simplest components of the RSFQ circuitry have been experimentally tested at clock frequencies exceeding 100 GHz, and an increase of the speed beyond 300 GHz is expected as a result of using an up-to-date fabrication technology. This review includes a discussion of possible future developments and applications of this novel, ultrafast digital technology.>