A programmable Josephson voltage standard (PJVS) circuit including 65,536 NbN/TiN/NbN Josephson junctions has been demonstrated at temperature of 12 K cooled with a cryocooler. The upper limit of the operating temperature has found to be about 13 K, while the operating margin significantly degraded.
A compact Programmable Josephson Voltage Standard (PJVS) system based on a cryocooler is under development at the National Institute of Advanced Industrial Science and Technology (AIST). The system uses a 2 V NbN/TiN/NbN PJVS chip operating at 12 K. Since the PJVS chip requires cooling power of less than 100 mW, it is possible to use a compact-size cryocooler, which may be mounted inside a standard 19-inch rack-mount chassis. By combining the 2 V PJVS chip with a high-precision semiconductor voltage multiplier circuit, it is possible to generate arbitrary voltages up to 20 V.
Programmable Josephson voltage standard (PJVS) circuits using arrays of NbN/TiN/NbN/TiN/NbN double-junction stacks were fabricated and operated at a temperature of 10 K. Four arrays each with 32 768 junctions produced expected voltage outputs when driven at (10, 15, 17, and 20) GHz with an operating current range of 0.2-1.0 mA. Another circuit showed constant-voltage steps at /spl plusmn/6 V when driven with an 11 GHz microwave bias, indicating that over 260 000 junctions were operating properly. This circuit did not show constant-voltage steps when driven with a 19 GHz microwave bias, which was the design frequency to achieve /spl plusmn/10 V output voltage.
A 10-V programmable Josephson voltage standard (PJVS) circuit including 524 288 vertically stacked NbN/TiN/NbN Josephson junctions was successfully fabricated without any defects. The chip was cooled with a compact cryocooler at a temperature of 9.8 K and generated an output voltage of 17.3 V with the first Shapiro step height of 1.0 mA under microwave irradiation at 16 GHz. Furthermore, the circuit design having the high output voltage increased the number of available chips for the 10-V PJVS. The fabrication yield for the chip, which generates greater than 10 V, was 36%, which is ten times greater than that for a perfect chip without any defects. This method was not effective for the chip that had serious defects, such as a disconnection across the array or short between the array and ground; thus, efforts to reduce such defects, e.g., frequent maintenance inside vacuum chambers for film preparation and etching, were found to be essential.
We have demonstrated a programmable Josephson voltage standard (PJVS) operation up to 10.84 V using a multi-chip technique. We combined two PJVS chips fabricated using NbN/(TiN x /NbN) 2 junction technology. Each PJVS chip was mounted on a single chip carrier using bonding wire, and the two chip carriers were connected by a simple Cu lead wire, and mounted on a cryocooler. High-precision measurements confirmed flat voltage steps for all 22 cells, with a peak-to-peak variation of 100 nV and wide margins of at least 0.35 mA. We also confirmed the stability of the voltage steps in spite of a temperature and RF frequency variation of ± 0.1 K and ± 0.1 GHz, respectively.
524,288 NbN-based Josephson junctions were integrated to produce a programmable Josephson voltage standard (PJVS) on a die of 15mm × 15mm, and the PJVS circuit was cooled to 10K using a cryocooler and operated with a current margin of about 1.0mA. Although an output voltage of 10V was required for a voltage standard, the circuit was designed to generate the maximum output voltage of 17V because it was difficult to avoid a reduction of the output voltage due to defects. Although a perfect chip without any defect was rarely fabricated, the high voltage chip that generated at least 10V was fabricated with the fabrication yield of larger than 30%. The fabrication yield was also improved by optimizing the film growth conditions to reduce the film stress and the number of particles. Applications for a secondary voltage standard and an ac Josephson voltage standard are also described.
The two main challenges to operating a programmable Josephson voltage standard (PJVS) on a cryocooler are the available cooling power and the temperature oscillations of the cold head. We overcame these challenges and successfully operated a PJVS circuit on a cryocooler by employing one supercritical helium buffer that damps the temperature oscillations, developing a new cryogenic package that increases the thermal conductivity between the chip and the cold head, and increasing overall device performance with fabrication improvements. A 1.32 mA step width of the quantized voltage produced with all of the subarrays of the PJVS circuit biased was achieved at an operating temperature of 4.3 K. The quantum accuracy of the PJVS is maintained at temperatures up to 4.8 K. This result was obtained with a cryocooler that employs a 3 kW water-cooled compressor to produce at the chip about 270 mW of net cooling power at 4.3 K.