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IEEE Communications Letters

FFT Based Sum-Product Algorithm for Decoding LDPC Lattices

Lida Safarnejad, Mohammad‐Reza Sadeghi

Published Aug 3, 2012• 20 citations
Publisher

Abstract

LDPC lattices were introduced by Sadeghi et al. in [13] and have a good performance under generalized minsum and sum-product algorithms. The high complexity of these algorithms is mainly due to the search for local valid codewords in each check node process. In addition, when the dimension of such lattices is increased, these decoding algorithms are very time-consuming. In this paper, we propose an FFT based sum-product algorithm to decode LDPC lattices. In the check node process, using the FFT method reduces the check node complexity from O(dcg2) to O(dcg log g) where dcis the degree of a check equation and g is the alphabet size of an LDPC lattice. As a result, with almost the same complexity cost, we have a significant improvement over the performance of the minsum based decoding 2-level LDPC lattices with the symbol error probability smaller than 10-5at SNR = 1.5 dB.

DOI
10.1109/lcomm.2012.073112.120996

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LDPC lattices were introduced by Sadeghi et al. in [13] and have a good performance under generalized minsum and sum-product algorithms. The high complexity of these algorithms is mainly due to the search for local valid codewords in each check node process. In addition, when the dimension of such lattices is increased, these decoding algorithms are very time-consuming. In this paper, we propose an FFT based sum-product algorithm to decode LDPC lattices. In the check node process, using the FFT method reduces the check node complexity from O(dcg2) to O(dcg log g) where dcis the degree of a check equation and g is the alphabet size of an LDPC lattice. As a result, with almost the same complexity cost, we have a significant improvement over the performance of the minsum based decoding 2-level LDPC lattices with the symbol error probability smaller than 10-5at SNR = 1.5 dB.
In this paper, an improved low-complexity sum-product decoding algorithm is presented for low-density parity-check (LDPC) codes. In the proposed algorithm, reduction in computational complexity is achieved by utilizing fast Fourier transform (FFT) with time shift in the check node process. The improvement in the decoding performance is achieved by utilizing an optimized integer constant in the variable node process. Simulation results show that the proposed algorithm achieves an overall coding gain improvement ranging from 0.04 to 0.46 dB. Moreover, when compared with the sum-product algorithm (SPA), the proposed decoding algorithm can achieve a reduction of 42%–67% of the total number of arithmetic operations required for the decoding process.
Low Density Parity Check (LDPC) codes have excellent error correcting performance. LDPC codes are one of the block coding techniques and it performs near Shannon limit and recommended for many practical applications. Non-binary LDPC codes extension of binary LDPC in error correcting property especially for short and moderate block length. In many digital communication systems these codes have strong competitors of turbo codes for error control. Low Density Parity Check as it name is suggests that in a parity check matrix (H) consists of very small number of non-zero elements comparing with zero elements. The strength of the LDPC code defines Parity Check Matrix (PCM). LDPC code contains two types of decoding algorithms hard and soft decision algorithm. By comparing with other traditional decoding algorithm FFT based sum product algorithm reduced computation complexity with better decoding performance. In this paper, LDPC codes for FFT based sum product decoding algorithm performances are analysed for various order of Galois Field GF(q) using AWGN channel. Decoding performance measured in terms of symbol error rate which improve with increasing order of Galois field.
Low-Density Parity check (LDPC) codes offer high-performance error correction near the Shannon limit which employs large code lengths and some iterations in the decoding process. The conventional decoding algorithm of LDPC is the Log Likelihood Ratio based Belief Propagation (LLR BP) which is also known as the `Sum-Product algorithm' which gives the best decoding performance and requires the most computational complexity and implementations with increased hardware complexity. Another simpler variant of this algorithm is used which is known as `min-sum algorithm' which reduces computational complexity as well as hardware complexity but with reduced accuracy. This paper analyzes the reason min-sum algorithm is more prone to errors when compared to the sum-product algorithm, and puts forward two improved algorithms which improve the performance of the min-sum algorithm with comparable algorithmic complexity.
Among various decoding algorithms of low-density parity-check (LDPC) codes, the minsum (MS) algorithm and its modified algorithms are widely adopted because of their computational simplicity compared to the sum-product (SP) algorithm with slight loss of decoding performance.In the MS algorithm, the magnitude of the output message from a check node (CN) processing unit is decided by either the smallest or the next smallest input message which are denoted as min1 and min2, respectively.It has been shown that multiplying a scaling factor to the output of CN message will improve the decoding performance.Further, Zhong et al. have shown that multiplying different scaling factors (called a 2-dimensional scaling) to min1 and min2 much increases the performance of the LDPC decoder.In this paper, the simplified 2-dimensional scaled (S2DS) MS algorithm is proposed.In the proposed algorithm, we figure out a pair of the most efficient scaling factors which multiplications can be replaced with combinations of addition and shift operations.Furthermore, one scaling operation is approximated by the difference between min1 and min2.The simulation results show that S2DS achieves the error correcting performance which is close to or outperforms the SP algorithm regardless of coding rates, and its computational complexity is the lowest comparing to modified versions of MS algorithms.
This paper has presented various min-sum related LDPC decoding algorithms and their typical hardware architectures of check node update in the scenario of parallel implementation. For one check node update of normalized min-sum algorithm, if the current row weight is dc, dcmultiplications are needed. If dcis large, dcmultiplications are needed, which leads to high complexity. In this article, one innovative method for check node update has been found, which can obviously reduce the number of multiplication operations for the normalized min-sum algorithm and the number of comparison/selection operations for the row weight matched min-sum algorithm of high rate LDPC codes. Simulations have claimed the performance of normalized min-sum and row weight matched min-sum is nearly the same as that of Log-BP, namely the optimal algorithm, which has shown that normalized min-sum and row weight matched min-sum are good choices for LDPC.
Very high data rates and decoding computational complexity place strict constraints in 5G and 6G communications. In this paper, non-uniform Quantized Decoding algorithm is proposed for Low-density Parity Check codes (LDPC). In the proposed algorithm, the check node updating process is carried out using quantization, which reduces complexity. The Sum Product Algorithm (SPA) is iterative message passing decoding techniques offer the optimal performance for LDPC codes. Implementations use message-passing decoding with more precision, results extremely high complexity. In Iterative, message-passing (MP), trapping sets and absorbing sets causes low error floor. In this article non-uniform quantization proposed to overcome dynamic range of values over uniform quantization. Simulation results provide coding gain increases closer to of 0.5 dB in higher SNR and has good error floor at 10−5.