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Journal of Electronics (China)

Regular Low-Density Parity-Check codes based on shifted identity matrices

Shanbao He, Chunming Zhao, Ming Jiang

Published Jan 1, 2006• 0 citations
Publisher
DOI
10.1007/s11767-004-0018-1

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A design algorithm of regular check matrix for Low-Density Parity-Check(LDPC)codes is proposed in this paper.The proposed approach is to design 3 sub-matrices,and each of the sub-matrices is combined by the cyclic shift matrices of the identity matrix,then to combine these sub-matrices into a desired parity check matrix according to our approach.Using the check algorithms of the short cycles to find the combinations of shifting operators by which the parity check matrix desires has no girth- four and no girth-six.The simulation results in AWGN channel show that the BER performance of these codes obtained by the generator matrix derived from the proposed check matrices to encode the random information bits is as good as that of random LDPC codes.
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In low-density parity-check (LDPC) code decoding with the iterative sum-product algorithm (SPA), due to the randomness of the parity-check matrix, H, the overlapping of the check node processing unit (CNU) and variable node processing unit (VNU) in the same clock cycle is difficult. The paper demonstrates that overlapped decoding can be exploited as long as the LDPC matrix is composed of identity matrices and their cyclic-shifted matrices, i.e., the parity-check matrix, H, belongs to a class of quasi-cyclic LDPC codes. It is shown that the number of clock cycles required for decoding can be reduced by 50% when overlapped decoding is applied to a (3,6)-regular LDPC code decoder.