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International Journal of Infrared and Millimeter Waves

A scale mixer model for sis waveguide receivers

Thomas H. B�ttgenbach, T. D. Groesbeck, B. N. Ellison

Published Jan 1, 1990• 12 citations
Publisher
DOI
10.1007/bf01009810

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Design of a w-band SIS mixer

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The mixer mount for a 75 -110 GHz SIS (superconductor-insulator-superconductor) receiver was scale modeled at 2 - 8 GHz . The mixer mount had a 4-step Chebychev single ridge transformer to launch the rf signal from the waveguide to a microstripline circuit. The microstripline circuit coupled the rf signal into the on-chip SIS element. A wire inductor in parallel with the mixer was used to tune out the capacitance of the SIS junction. Both the junction and the inductor had rf grounds provided by 90° radial stubs. In the scale model, a 50 Ω chip resistor in parallel with a 1 pF chip capacitor was used in place of the SIS junction to measure the rf matching properties. The inductor was modeled with a thin copper wire. The VSWR of the entire mount was less than 2.1 : 1 over the frequency band corresponding to 75 - 107 GHz. Receiver measurements with the actual mixer mount employing trilayer SIS tunnel junctions gave similar trends across the band.

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Measurements on frequency-scaled models of SIS-mixers

U. Pisani, Franco Rosso, L. Brunetti

Measurement•Sep 1, 1996•1 citation
This paper describes the first experimental results for a waveguide-type all-NbN superconductor-insulator-superconductor (SIS) heterodyne mixer on an MgO substrate designed to operate over the gap frequency of Nb. The mixer consists of an NbN/MgO/NbN junction, which has a length of one wavelength at 880GHz as a tuning circuit, an NbN/MgO/NbN microstrip as a λ/4 impedance transformer, and an RF choke filter. The mixer chip was designed using a high-frequency-structure simulator. Its return-loss and embedding-impedance characteristics were examined using a 180-times-scaled mixer model. By optimizing the cutting and polishing processes for the MgO substrate, we were able to fabricate the mixer chip with an accuracy of less than 5 μm. We succeeded in mounting the chip on a mixer block and in estimating the receiver noise temperature. The uncorrected minimum double-sideband receiver noise temperature was 740 K at 824 GHz. A comparison of the receiver noise temperature in a quasi-optical SIS mixer fabricated on the same wafer as the waveguide mixer showed that input noise was the major contributor to receiver noise in the waveguide mixer.
The mixer mount for a 75 -110 GHz SIS (superconductor-insulator-superconductor) receiver was scale modeled at 2 - 8 GHz . The mixer mount had a 4-step Chebychev single ridge transformer to launch the rf signal from the waveguide to a microstripline circuit. The microstripline circuit coupled the rf signal into the on-chip SIS element. A wire inductor in parallel with the mixer was used to tune out the capacitance of the SIS junction. Both the junction and the inductor had rf grounds provided by 90° radial stubs. In the scale model, a 50 Ω chip resistor in parallel with a 1 pF chip capacitor was used in place of the SIS junction to measure the rf matching properties. The inductor was modeled with a thin copper wire. The VSWR of the entire mount was less than 2.1 : 1 over the frequency band corresponding to 75 - 107 GHz. Receiver measurements with the actual mixer mount employing trilayer SIS tunnel junctions gave similar trends across the band.