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ACM International Conference on Computing Frontiers (CF)

Reversible computing

Alexis De Vos, Yvan Van Rentergem

Published May 4, 2005• 29 citations
Publisher

Abstract

Reversible logic gates of a certain logic width w form a group (isomorphic to the symmetric group of order (2 w )!). Study of the subgroups of this group both teaches us a lot about properties of reversible gates and guides us to synthesize particular circuits. After design, circuits are implemented in prototype silicon chips.
DOI
10.1145/1062261.1062270

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Journal of Physics A Mathematical and General•Aug 7, 2002•81 citations
Reversible logic circuits are beneficial to both classical and quantum computer design. Present-day logic building-blocks (like OR gates and NAND gates) are logically irreversible and therefore cannot be used for designing reversible computers. Thus reversible computation needs an appropriate design methodology. In contrast to conventional digital logic circuits, reversible logic circuits (of a same logic width w) form a mathematical group. The reversible circuits of width w form a group isomorphic to the symmetric group S_{2^w}. Its Young subgroups allow systematic and efficient synthesis of an arbitrary reversible circuit. We can choose either a left coset, a right coset, or a double coset approach. The optimal design is reminiscent of the so-called banyan networks of telecommunication. As an illustration, three experimental prototypes (in c-MOS chip technology) of reversible computing devices are presented. Special care has been taken to avoid as much as possible the appearance of garbage bits. The examples illustrate how, in a near future, reversible computers will outperform conventional computers, in terms of power dissipation and heat generation.
The (2w)! reversible transformations on w wires, i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group, isomorphic to the symmetric group S2w. Therefore, we investigate the group Snas well as one of its subgroups isomorphic to Sn/2times Sn/2. We then consider the left cosets, the right cosets, and the double cosets generated by the subgroup. Each element of a coset can function as the representative of the coset. Different choices of the coset space and different choices of the coset representatives lead to four different syntheses for implementing an arbitrary reversible logic operation into hardware. Comparison leads to a best choice: a single coset space, with representatives that are generalized TOFFOLI and FREDKIN gates.
The (2 w )! reversible logic circuits of width w , i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group G , isomorphic to the symmetric group . We define two conjugate subgroups G 1 and G 2 . Together they partition the group G into 2 w −1 + 1 double cosets. These allow us to decompose an arbitrary member of G into a cascade of three simpler members. This decomposition is a far relative of the well-known LU decomposition of a square matrix.
The (2w)! reversible transformations on w wires, i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group, isomorphic to the symmetric group S2w. Therefore, we investigate the group Sn as well as one of its subgroups isomorphic to Sn/2 × Sn/2. We then consider the left cosets, the right cosets, and the double cosets generated by the subgroup. Each element of a coset can function as the representative of the coset. The coset can then be considered as the set of all group elements that differ from the representative by merely multiplying (either to the left or to the right or to both sides) by an arbitrary element of the subgroup. Different choices of the coset space and different choices of the coset representatives lead to six different syntheses for implementing an arbitrary reversible logic operation into hardware. Evaluation of all six methods, by means of three different cost functions (gate cost, switch cost, and quantum cost), leads to a best choice.