It is argued that a large-inductance superconducting loop interrupted by a single Josephson junction can function as a memory element. Bundles of flux quanta can be stored in the cell and removed from it by the application of appropriate bias currents or fields.
The talk is based on an overview which was published recently (1). For this reason, only an abstract is given here, which includes Later results not contained in the aforementioned overview. The presently-known Josephson memory cells store information as persistent currents in superconducting loops, or what is equivalent as a magnetic flux in the area of the ring. This method of storage is nonvolatile and has no power consumption in the storing state. In a superconducting ring system, the magnetic flux is quantized, and cells have been built which operate either with only one flux quantum, or with many of them. For the Latter cells with many flux quanta (ring cells), quite a number of designs exist. They have one or two Josephson junctions in the ring, which allow writing. An external junction which is controlled by the ring current serves for non-destructive reading of the information. The smallest cell realized had an area of 900 ?m2 with a 2 ?m minimum line width. Switching speed was ? 80 ps. Cells which store information as a single-flux quantum (single flux-quantum cells = SFQ cells) in the ring, usually contain two Josephson junctions used for reading and writing. Read-out in most of these cells is destructive, but methods of reading non-destructively have also been proposed. The smallest device made had an area of ? 150 ?m2 with a minimum line width of 2 ?m. The read signal had a rise time ? 100 ps.
Over the past few decades, superconducting circuits have been used to realize various novel electronic devices such as quantum bits, SQUIDs, parametric amplifiers, etc. One domain, however, where superconducting circuits fall short is information storage. Superconducting memories are based on the quantization of magnetic flux in superconducting loops. Standard implementations store information as magnetic flux quanta in a superconducting loop interrupted by two Josephson junctions (i.e., a SQUID). However, due to the large inductance required, the size of the SQUID loop cannot be scaled below several micrometers, resulting in low-density memory chips. Here, we propose a scalable memory consisting of a voltage-biased superconducting ring threaded by a half-quantum flux bias. By numerically solving the time-dependent Ginzburg-Landau equations, we show that applying a time-dependent bias voltage in the microwave range constitutes a writing mechanism to change the number of stored flux quanta within the ring. Since the proposed device does not require a large loop inductance, it can be scaled down, enabling a high-density memory technology.
The φ Josephson junction has a doubly degenerate ground state with the Josephson phases ±φ. We demonstrate the use of such a φ Josephson junction as a memory cell (classical bit), where writing is done by applying a magnetic field and reading by applying a bias current. In the “store” state, the junction does not require any bias or magnetic field, but just needs to stay cooled for permanent storage of the logical bit. Straightforward integration with rapid single flux quantum logic is possible.
The design and experimental results for a novel type of Josephson memory cell are presented. The cell has a simpler construction than the conventional Henkels-type, using a one-junction SQUID (superconducting quantum interference device) capacitively coupled to a single junction. Binary data are stored as single flux quanta and are destructively read out by sensing a pulse caused by a vortex-mode transition. Computer simulations suggest that the read operation could be performed with a bias margin for the sense junction of +or-28% and that the rise time of the sense current in a 16-bit memory cell would be as fast as 30 ps, despite having to sense a vortex-mode transition. Results are presented for a memory cell fabricated with Nb-AlO/sub x/-Nb junctions.>
A new vortex transitional NDRO memory cell has been proposed for use as a high-speed cache memory. The memory cell consists of two superconducting loops with one Josephson junction and a two-junction interferometer gate. The superconducting loop stores single-flux quantum. The interferometer gate operates as a sense gate. The memory cell employs a vortex transition in the superconducting loop for the writing and reading of data. The sense gate current margin increases to ±38% since the coupling magnetic flux is amplified by the vortex transition for nominally designed cell parameters. The memory cell operates with a ±33% address signal current margin. This paper describes the memory cell design and the dynamic behavior of computer simulations.