Existence of “free will” as a problem of physics

Friedwardt Winterberg

Asher Peres

The proof of Bell's inequality is based on the assumption that distant observers can freely and independently choose their experiments. As Bell's inequality isexperimentally violated, it appears that distant physical systems may behave as a single, nonlocal, indivisible entity. This apparent contradiction is resolved. It is shown that the “free will” assumption is, under usual circumstances, an excellent approximation.

Klaas Landsman

Zixiang Li, Zhou‐Quan Wan, Hong Yao

As an intrinsically-unbiased approach, quantum Monte Carlo (QMC) is of vital importance in understanding correlated phases of matter. Unfortunately, it often suffers notorious sign problem when simulating interacting fermion models. Here, we show for the first time that there exist interacting fermion models whose sign problem becomes less severe for larger system sizes and eventually disappears in the thermodynamic limit, which we dub as "asymptotic sign free". We demonstrate asymptotically-free sign in determinant QMC for various interacting models. Moreover, based on renormalization-group-like ideas we propose a heuristic understanding of the feature of asymptotic sign free. We believe that asymptotic sign free behavior could shed new lights to deepening our understanding of sign problem. More importantly, it can provide a promising way to decipher intriguing physics in correlated models which were conventionally thought not accessible by QMC.

Tsou-An Wu, Ying-Jie Jiang, Shao‐Yun Fang

Layout synthesis in quantum circuits maps the logical qubits of a synthesized circuit onto the physical qubits of a hardware device (coupling graph) and complies with the hardware limitations. Existing studies on the problem usually suffer from intractable formulation complexity and thus prohibitively long runtimes. In this paper, we propose an efficient layout synthesizer by developing a satisfiability modulo theories (SMT)-based qubit mapping checker. The proposed qubit mapping checker can efficiently derive a SWAP-free solution if one exists. If no SWAP-free solution exists for a circuit, we propose a divide-and-conquer scheme that utilizes the checker to find SWAP-free sub-solutions for sub-circuits, and the overall solution is found by merging sub-solutions with SWAP insertion. Experimental results show that the proposed optimization flow can achieve more than 3000× runtime speedup over a state-of-the-art work to derive optimal solutions for a set of SWAP-free circuits. Moreover, for the other set of benchmark circuits requiring SWAP gates, our flow achieves more than 800× speedup and obtains near-optimal solutions with only 3% SWAP overhead.