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IEEE-NPSS Real-Time Conference

Time interval analyzer with FPGA-based TDC for free space quantum key distribution: Principle and validation with prototype setup

Qi Shen, Sheng‐Kai Liao, Shubin Liu, Jinhong Wang, Wei-Yue Liu, Cheng-Zhi Peng, Qi An

Published Jun 1, 2012• 3 citations
Publisher

Abstract

Quantum key distribution (QKD) is the most matured application of quantum communication. The time synchronization and system timing jitter are essential to a practical QKD experiment, which can directly influence the quantum bit error rate (QBER) and the final key rate. High precision time-to-digital convertor (TDC) can effectively reduce the system timing jitter, resulting in lower QBER and higher key rate. Here, we introduce a TDC based on a field-programmable gate array (FPGA). Its high resolution of 50 ps, low dead time and large dynamic range can well meet the requirement of the QKD experiment. A free space QKD system setup using the FPGA-based TDC has been built up. The timing precision of the synchronous light and the system timing jitter were tested. The results demonstrate that the FPGA-based TDC could be successfully applied in the QKD experiment.

DOI
10.1109/rtc.2012.6418107

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Quantum key distribution (QKD) is the most matured application of quantum communication. The time synchronization and system timing jitter are essential to a practical QKD experiment, which can directly influence the quantum bit error rate (QBER) and the final key rate. High precision time-to-digital convertor (TDC) can effectively reduce the system timing jitter, resulting in lower QBER and higher key rate. Here, we introduce a TDC based on a field-programmable gate array (FPGA). Its high resolution of 50 ps, low dead time and large dynamic range can well meet the requirement of the QKD experiment. A free space QKD system setup using the FPGA-based TDC has been built up. The timing precision of the synchronous light and the system timing jitter were tested. The results demonstrate that the FPGA-based TDC could be successfully applied in the QKD experiment.
Quantum key distribution (QKD) is the most matured application of quantum communication. The time synchronization and system timing jitter are essential to a practical QKD experiment, which can directly influence the quantum bit error rate (QBER) and the final key rate. High precision time-to-digital converters (TDCs) can effectively reduce the system timing jitter, resulting in lower QBER and higher key rate. Here, we introduce a TDC based on a field programmable gate array (FPGA). Its high resolution (LSB) of 50 ps with precision (RMS) less than 50 ps, low dead time and large dynamic range can well meet the requirement of the QKD experiment. A free space QKD system setup using the FPGA-based TDC has been assembled. The timing precision of the synchronous light and the system timing jitter were determined. The results demonstrate that the FPGA-based TDC could be successfully applied in the QKD experiment.
Intrinsic nonlinearity in FPGA-based time-to-digital converters (TDCs) is often treated as a calibration issue and evaluated mainly through post-correction metrics. In quantum key distribution (QKD), however, raw delay-line nonuniformity can affect coincidence timing and thereby influence accidental-coincidence rate and Quantum Bit Error Rate (QBER). This paper analyzes how measured FPGA-TDC nonlinearity propagates to QKD timing metrics using a conservative system-level model that combines random timing uncertainty and deterministic nonlinearity. We also propose fabric-level mitigation strategies based on LUT-assisted delay shaping and placement constraints to reduce severe bin-width irregularities without statistical calibrations. The method is evaluated by reproducing two open-source TDCs implemented on a low-cost Zynq-7000 FPGA. We observe reductions of 14\%-21\% in integral nonlinearity (INL) compared with the non-optimized design, leading to a reduced QBER contribution and an improvement by 3.7\%-14.2\% in the estimated secret fraction. These results suggest that raw FPGA-TDC nonlinearity deserves explicit consideration in timing-sensitive QKD implementations.
Time-to-Digital Converters (TDCs) are a crucial tool in a wide array of fields, in particular for quantum communication, where time taggers performance can severely affect the quality of the entire application. Nowadays, FPGA-based TDCs present a viable alternative to ASIC ones, once the non-linear behavior due to the intrinsic nature of the device is properly mitigated. To compensate for said nonlinearities, a calibration procedure is required, which should be maintained throughout its runtime. Here we present the design and the demonstration of a TDC that is FPGA-based showing a residual FWHM jitter of 27 ps, that is scalable for multichannel operation. The target application in Quantum Key Distribution (QKD) is discussed with a calibration method based on the exploitation of single-photon detection that does not require stopping the data acquisition or using any estimation methods, thus increasing accuracy and removing data loss. The calibration was tested in a relevant environment, investigating the behavior of the device between 5 °C and 80 °C. Moreover, our design is capable of continuously streaming up to 12 Mevents/s for up to ~1 week without the TDC overflowing making it ready for a real-life scenario deployment.
Free-space quantum key distribution (QKD) is being developed for achieving unconditional secure communication over ultra-long distance, which requires higher electronics performance, such as higher time measurement precision, higher data-transfer rate, and higher system integration density. As part of the ground station of the Quantum Science Satellite that will be launched in 2016, we specifically designed a compact PCI-based measurement and control electronics with high time-resolution and high data-transfer-rate. Some necessary modules in the quantum communication experiment such as multi-channel counter, system monitor and experiment control are also integrated in a single board. The electronics performance of this system was tested, with the time precision bin size is 23.9 ps and the time resolution root-mean-square (RMS) is less than 24 ps for 16 channels. The dead time is 30 ns. The data transfer rate to a local computer is up to 35 MBps, and the count rate is up to 30 MHz. The system has been proven to perform well and operate stably through a test of in-door free space QKD experiment.
This thesis work is about the realization of hardware and software systems for Quantum Random Number Generation (QRNG) and Quantum Key Distribution (QKD). Such systems were developed to guarantee a full functionality for a broader investigation of these two cutting edge applications of Quantum Information field. The thesis describes in details both the hardware and the software that were developed for FPGA-CPU board, Time-to-Digital converter (TDC) devices and computers, along with QRNG and QKD specific applications and their results. Randy was the first FPGA-based QRNG device to be developed; it uses a light source attenuated to single-photon level and one single-photon avalanche diode (SPAD). From the sampling of the SPAD electrical signal, the device produces random numbers through dedicated generation protocols and through the Peres unbiasing algorithm in order to maximize the output generation bit rate. Furthermore, the device allows to generate real time random numbers. This feature is used for the time setting of electro-optical components for extending Wheeler’s delayed-choice experiment to space. The same techniques were applied to a second device, LinoSPAD; it combines an FPGA-chip and a CMOS-SPADs array. Moreover, in this device, a TDC improves the photon detection time accuracy. Along with a dedicated post-processing based on Zhou-Bruk algorithm, the TDC allowed to reach a final bit rate equivalent to 300 Mbit/s. As far as QKD systems are concerned, within the collaboration among the University of Padova, the Italian Space Agency (ASI) with the Matera Laser Ranging Observatory (MLRO) and the Chinese Academy of Sciences (CAS) a TDC device management software was developed. The project aim is to realize a quantum cryptographic key exchange between the Chinese satellite Micius and MLRO. The software was designed to manage the entire data acquisition synchronized with UTC time. Furthermore, another software was designed to deal with electro-optomechanical and electro-optical components. The software is aim at the time-variant compensation of the beam angular changes through the optical path. Once again, within a collaboration between ASI and University of Padova, a full free space QKD system over tenths of kilometers was developed. It required the design of various components. This work describes the QKD source along with the dedicated FPGA board design. Such board generates the electrical impulses to control the qubit laser along with the electro-optic phase and intensity modulators.
Coincidence counters play the role of gating events from the background noise in almost every quantum photonics setup. Precise multi-channel and high count-rate coincidence counting tools have become desirable due to an increase in the complexity of quantum photonics experiments. However, timing analyzers are struggling to meet these needs. We are proposing a Field Programmable Gate Array (FPGA) based coincidence counting system which provides 8 operational channels with 8.9 ps root mean square (RMS) resolution (with a bin width of 7.7 ps) and a count-rate of 320 million counts per second (MCPS) (with 40 MCPS per channel). We have successfully tested our design in different quantum photonics scenarios such as the detection of two-photon interference and pseudo-photon-number resolving detection of a coherent state of light where it has shown its capability of working beyond the saturation of detectors. Also, we have introduced a Dual Data Rate Registration TDC, which improved the linearity of the time tagging operation by using both clock edges without increasing the dead-time or using the space excessively. 1.2 LSB in max DNL error, 1.8 LSB in max INL error, 10 ps in FWHM and 3.2 ps in RMS resolution improvements were achieved.