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A merry-go-round decoding scheme for non-binary quasi-cyclic LDPC codes

Keke Liu, Juane Li, Shu Lin, Khaled Abdel-Ghaffar

Published Dec 1, 2014• 3 citations
Publisher

Abstract

This paper presents a reduced-complexity iterative scheme and an algorithm for decoding non-binary quasi-cyclic (QC) LDPC codes of a specific type. The proposed decoding scheme and the algorithm together significantly reduce the hardware implementation complexity of a decoder with no performance degradation. Also presented in the paper is a simple method for constructing a class of non-binary QC-LDPC codes.

DOI
10.1109/glocom.2014.7037020

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This paper presents a reduced-complexity iterative scheme and an algorithm for decoding non-binary quasi-cyclic (QC) LDPC codes of a specific type. The proposed decoding scheme and the algorithm together significantly reduce the hardware implementation complexity of a decoder with no performance degradation. Also presented in the paper is a simple method for constructing a class of non-binary QC-LDPC codes.
This paper presents two simple and very flexible methods for constructing non-binary (NB) quasi-cyclic (QC) LDPC codes. The proposed construction methods have several known ingredients including base array, masking, binary to nonbinary replacement, and matrix-dispersion. By proper choice and combination of these ingredients, NB-QC-LDPC codes with excellent performance can be constructed. The constructed codes can be decoded with a reduced-complexity iterative decoding scheme which significantly reduces the hardware implementation complexity.
Presented in this paper is a reduced-complexity iterative decoding scheme for quasi-cyclic (QC) LDPC codes. This decoding scheme is devised based on the section-wise cyclic structure of the parity-check matrix of a QC-LDPC code. Using this decoding scheme, the hardware implementation complexity of a QC-LDPC decoder can be significantly reduced without performance degradation. A high-rate QC-LDPC code that can achieve a very low error-rate without a visible error-floor is used to demonstrate the effectiveness of the proposed decoding scheme. Also presented in this paper are two other high-rate QC-LDPC codes and a method for constructing rate -1/2 QC-LDPC codes whose Tanner graphs have girth 8. All the codes constructed perform well with low error-floor using the proposed decoding scheme.
This paper presents a reduced-complexity iterative decoding scheme for quasi-cyclic (QC) low-density parity-check (LDPC) codes which is devised based on the section-wise cyclic structure of their parity-check matrices. The decoding scheme significantly reduces the hardware implementation complexity of a QC-LDPC code decoder in terms of the number of message processing units and the number of wires required to connect the message processing units. A long high-rate high-performance QC-LDPC code is used to demonstrate the effectiveness of the proposed decoding scheme. Using this long code as the mother code, descendant QC-LDPC codes of various lengths and rates can be constructed by puncturing and masking the columns and rows of the parity-check matrix of the mother code. These descendant codes can be decoded by deactivating specific sets of message processing units of the mother decoder.
Cyclic and quasi-cyclic algebraic LDPC codes constructed based on finite fields, finite geometries, and combinatorial designs can achieve excellent performance in terms of error rate, error floor and rate of decoding convergence with iterative decoding. However, the relatively high density of the parity-check matrix of an algebraic cyclic or quasi-cyclic LDPC code makes the hardware implementation complexity of the decoder quite large, which may be a critical issue in practical applications. This paper presents an effective reduced-complexity algorithm for decoding algebraic cyclic and quasi-cyclic LDPC codes based on the block cyclic structure and cyclic grouping of the rows of their parity-check matrices. The decoding of a code is carried out based on a single small submatrix of the parity-check matrix of the code in a revolving manner. The proposed decoding algorithm significantly reduces the hardware implementation complexity and the size of memory required to store information.
Non-binary quasi-cyclic (NB-QC) codes are a class of graph-based codes with high performance and implementation-friendly structure. In this paper, we introduce a new method for designing NB-QC codes with improved performance in the low error-rate region. Specifically, we propose a construction which reduces the number of non-binary absorbing sets, which are known to cause errors when decoding non-binary LDPC codes. Our construction is based on a careful selection of the code design parameters. Simulation results demonstrate the superior performance of codes designed according to our technique compared to existing state-of-the-art NB-QC codes.