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A Layered Architecture for Quantum Computing Using Quantum Dots

N. Cody Jones, Rodney Van Meter, Austin G. Fowler, Peter L. McMahon, Jungsang Kim, Thaddeus D. Ladd, Y. Yamamoto

Published Oct 24, 2010• 38 citations
OpenAlex

Abstract

We address the challenge of designing a quantum computer architecture with a layered framework that is modular and facilitates faulttolerance. The framework is flexible and could be used for analysis and comparison of differing quantum computer designs. Using this framework, we develop a complete, layered architecture for quantum computing with optically controlled quantum dots, showing how a myriad of technologies must operate synchronously to achieve fault-tolerance. Our design deliberately takes advantage of the large possibilities for integration afforded by semiconductor fabrication. Quantum information is stored in the electron spin states of a charged quantum dot controlled by ultrafast optical pulses. Optical control makes this system very fast, scalable to large problem sizes, and extensible to quantum communication or distributed architectures. The design of this quantum computer centers on error correction in the form of a topological surface code, which requires only local and nearest-neighbor gates. We analyze several important issues of the surface code that are relevant to an architecture, such as resource accounting and the use of Pauli frames. Furthermore, we investigate the performance of this system and find that Shor’s factoring algorithm for a 2048-bit number can be executed in approximately one week. PACS numbers: 03.67.Pp, 03.67.Lx, 85.35.Be, 73.21.La, 85.40.Hp

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We address the challenge of designing a quantum computer architecture with a layered framework that is modular and facilitates faulttolerance. The framework is flexible and could be used for analysis and comparison of differing quantum computer designs. Using this framework, we develop a complete, layered architecture for quantum computing with optically controlled quantum dots, showing how a myriad of technologies must operate synchronously to achieve fault-tolerance. Our design deliberately takes advantage of the large possibilities for integration afforded by semiconductor fabrication. Quantum information is stored in the electron spin states of a charged quantum dot controlled by ultrafast optical pulses. Optical control makes this system very fast, scalable to large problem sizes, and extensible to quantum communication or distributed architectures. The design of this quantum computer centers on error correction in the form of a topological surface code, which requires only local and nearest-neighbor gates. We analyze several important issues of the surface code that are relevant to an architecture, such as resource accounting and the use of Pauli frames. Furthermore, we investigate the performance of this system and find that Shor’s factoring algorithm for a 2048-bit number can be executed in approximately one week. PACS numbers: 03.67.Pp, 03.67.Lx, 85.35.Be, 73.21.La, 85.40.Hp
We develop a layered quantum computer architecture, which is a systematic framework for tackling the individual challenges of developing a quantum computer while constructing a cohesive device design. We discuss many of the prominent techniques for implementing circuit-model quantum computing and introduce several new methods, with an emphasis on employing surface code quantum error correction. In doing so, we propose a new quantum computer architecture based on optical control of quantum dots. The timescales of physical hardware operations and logical, error-corrected quantum gates differ by several orders of magnitude. By dividing functionality into layers, we can design and analyze subsystems independently, demonstrating the value of our layered architectural approach. Using this concrete hardware platform, we provide resource analysis for executing fault-tolerant quantum algorithms for integer factoring and quantum simulation, finding that the quantum dot architecture we study could solve such problems on the timescale of days.
The development of a large scale quantum computer is a highly sought after goal of fundamental research and consequently a highly non-trivial problem. Scalability in quantum information processing is not just a problem of qubit manufacturing and control but it crucially depends on the ability to adapt advanced techniques in quantum information theory, such as error correction, to the experimental restrictions of assembling qubit arrays into the millions. In this paper, we introduce a feasible architectural design for large scale quantum computation in optical systems. We combine the recent developments in topological cluster state computation with the photonic module, a simple chip-based device that can be used as a fundamental building block for a large-scale computer. The integration of the topological cluster model with this comparatively simple operational element addresses many significant issues in scalable computing and leads to a promising modular architecture with complete integration of active error correction, exhibiting high fault-tolerant thresholds.
The development of a large scale quantum computer is a highly sought after goal of fundamental research and consequently a highly nontrivial problem. Scalability in quantum information processing is not just a problem of qubit manufacturing and control but it crucially depends on the ability to adapt advanced techniques in quantum information theory, such as error correction, to the experimental restrictions of assembling qubit arrays into the millions. In this paper, we introduce a feasible architectural design for large scale quantum computation in optical systems. We combine the recent developments in topological cluster state computation with the photonic module, a simple chip-based device that can be used as a fundamental building block for a large-scale computer. The integration of the topological cluster model with this comparatively simple operational element addresses many significant issues in scalable computing and leads to a promising modular architecture with complete integration of active error correction, exhibiting high fault-tolerant thresholds.
Fault tolerance is an indispensable prerequisite for constructing large-scale universal quantum computers. Drawing philosophies from classical computer architecture, this paper presents a hardware-agnostic three-layer high-level architectural framework for generic fault-tolerant quantum computation. Guided by the real execution workflows of fault-tolerant quantum algorithms, the proposed model is decoupled from specific physical qubit hardware platforms and quantum error correction codes, serving as a universal abstract standard rather than a platform-specific implementation scheme. Special attention is devoted to the intermediate Fault-Tolerance Layer, which serves as the architectural bridge between application-level logical programs and hardware-level execution. We systematically characterize its five internal components, the interfaces and data exchanged among them, and the execution, correction, and adaptation paths that together enable logical synthesis, fault-tolerant resources management, decoding, and runtime fault-tolerant control. An end-to-end example is further provided to illustrate the full-stack operating pipeline of fault-tolerant quantum algorithms under this framework. Given the increasing emphasis on modular, heterogeneous, and cross-layer fault-tolerant quantum systems, our architecture provides a unified foundational model for organizing such designs.
The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.
Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.