In this paper we present a large array of SPADs and we discuss its suitability for applications different than imaging, exploring in particular how to transform it into a high speed True Random Number Generator (TRNG). The proposed matrix comprises 512x128 independent cells that convert photons into a raw bit-stream, which, as ensured by the properties of quantum physics, is characterized by a very high level of randomness. The sequences are read out in a 128-bit parallel bus, concatenated, and pipelined onto a de-biasing filter. Our results, achieved by coupling two matrices, show that our architecture can reach up to 5 Gbit/s while consuming 25pJ/bit, to our knowledge the lowest in a TRNG to date.
In this paper we present a large array of SPADs and we discuss its suitability for applications different than imaging, exploring in particular how to transform it into a high speed True Random Number Generator (TRNG). The proposed matrix comprises 512x128 independent cells that convert photons into a raw bit-stream, which, as ensured by the properties of quantum physics, is characterized by a very high level of randomness. The sequences are read out in a 128-bit parallel bus, concatenated, and pipelined onto a de-biasing filter. Our results, achieved by coupling two matrices, show that our architecture can reach up to 5 Gbit/s while consuming 25pJ/bit, to our knowledge the lowest in a TRNG to date.
Single-Photon Avalanche Diodes (SPADs) are solid-state photo-detectors capable of detecting single photons by exploiting the avalanche effect that occurs in the breakdown of a p-n junction biased above breakdown voltage. By this effect, a SPAD translates an incoming photon to a macroscopic current pulse. These devices are currently used for building medical devices characterized by a very high time resolution. An appealing application of SPAD is to use them as a basic block for building the entropy source of true random number generators. In this paper we focus on such application, and we explore the design challenges behind the realization of a quantum random number generator based on a massively parallel array of SPADs. The matrix under investigation comprises 512×128 independent cells that convert photons onto a raw bit-stream, which, as ensured by the properties of quantum physics, is characterized by a very high level of randomness. The sequences are read out in a 128-bit parallel bus, concatenated, and pipelined onto a de-biasing filter. Subsequently, we fabricated the proposed chip using a standard CMOS process. Our results, achieved on the manufactured device and coupling two matrices, show that our architecture can reach up to 5 Gbit/s while consuming 25pJ/bit, thus demonstrating scalability and performance for any random number generators based on SPADs.
A robust true random number generator (TRNG), able to assure high quality output at different working conditions, is an attractive solution in secure communication application, because it increases resilience against possible external attacks. Among different TRNGs, quantum RNGs (QRNG) represent a good candidate for such systems, because of their compactness, low cost and performance [1–6]. They typically consist of a source of photons, such as an attenuated LED, coupled to a detector with single photon capability (SPAD). Many works in the literature have used a single detector [1–4] for random bit extraction. These devices are characterized by a limited bit rate [1], which can be increased by exploiting the arrival time of photons at the cost of circuit and system complexity [2–4]. Recent works [5–6] proposed to implement an array of detectors based on SPAD working in parallel thus extending the speed of QRNG up to 5 Gb/s [5]. Despite the high bit rate, the main drawback of [5] is the strong dependence of each pixel bias on the impinging light intensity which forces the system to work only for a narrow range of photon flux that poses several constraints on the design of the final QRNG system, e.g. the need of a feedback control loop to maintain a constant flux of photons, and of a uniform distribution of light over the entire sensor. Moreover, it is impractical to implement algorithms for bit extraction to all detectors of the array because of different responses and mismatches among SPADs.
In today's digital life, security and encryption are becoming more and more important. As random number generators are a fundamental block of security and encryption, it is crucial to guarantee that these devices operate securely. Random numbers are usually generated in two ways; pseudo random number generators (PRNGs) and true random random number generators (TRNGs). PRNGs output a sequence based on a seed and a mathematical function. The deterministic nature of pseudo RNG devices can result in the PRNG not being applicable for all protocols, in which case TRNGs are needed. Almost all strong cryptography requires TRNGs to generate keys. The difference is that these devices instead rely on real world physics in order to generate a random number. The TRNG implementation explored in this thesis makes use of the quantum mechanical properties of photons. TRNGs making use of this principle of elementary quantum mechanical decision making are called quantum random number generators (QRNGs). This source of entropy provided by photons can be extracted by utilizing SPADs. QRNG devices based on SPADs have been made before in different ways, however there are still large grounds undiscovered when concerning SPAD based designs. As SPAD based QRNGs can be completely produced using CMOS technology, a world of possibilities open, including integration with already existing designs. Different aspects of SPAD QRNG designs will be discussed in this thesis; size, speed, hybrid designs and QRNG test-benching. The first part of the exploration focuses on creating an as small as possible QRNG. This resulted in a QRNG design which is as small as just one flip-flop and one SPAD, which is the smallest QRNG at the time of writing to the authors knowledge. Simulations show that the device is able to run up to 25 Mb/s using a SPAD with low deadtime. This device has been produced using 140nm technology by STMicroelectronics. The second part of the exploration, delves into how fast a SPAD based QRNG can be. The main goals here were to make the fastest possible QRNG with good scalability characteristics. This resulted in a design proposition based on the difference in the time of flight of two photons. This design is simulated using Matlab, and can reach 70 Mb/s per SPAD-duo depending on the deadtime of the SPAD used. When using a SPAD with a deadtime of 1us, the scaled up design needs only 16% of the SPADS needed by a state-of-the-art SPAD based QRNG design based on simulations. The amount of SPADs needed however schales almost linearly with a lower deadtime, having the potential to need only a fraction of the SPADs needed by the state-of-the-art in order to reach the same speeds. Then the concept of hybrid devices is explored, making use of a combination of PRNG and QRNG systems. The first hybrid design proposed is a design in which a very small QRNG is used to generate the key for multiple secure PRNG systems. The PRNG system used in this design is a trivium stream cypher. The design is completely written in VHDL except for the external QRNG. It then has been compiled and simulated using ModelSim, again using 140nm technology by STMicroelectronics. This resulted in a design which is able to reach speeds of 640 Gb/s, while using a total area of 99936 um2. The second hybrid device proposes a LFSR based design, which makes use of multiple very small QRNG devices to influence the function that the LFSR implements in order to increase the security. The last part of the exploration explores how it can be made easier and faster to test QRNG designs in an early design stage more accurately. As the source of entropy is quantum, the only risk of affecting the randomness is purely in which form the data of the photons is processed. By creating a chip which is able to extract the time of flight and the exact location of where the photon hit, testing potential QRNG devices can already be done in an early design stage with real-time data. A part of the chip that measures the time of flight of the photons arriving, has been designed in 40nm technology by STMicroelectronics. This part is a novel counter based on the principle of Gray counting, and is simulated extensively using extracted layout simulations. These simulations show that the device is able to run at speeds up to 3.6 GHz.
This brief presents the application of perimeter-gated single-photon avalanche diodes (pg-SPADs) as true random number generators (TRNGs). Typical SPADs have been used as random number generators (RNGs) in photon-based or dark event-based configurations, and they utilize complex debiasing algorithms to increase their random bit efficiency (RBE). In contrast, we propose leveraging the dark count rate modulation property of pg-SPADs to enable true random number generation using simpler debiasing algorithms. Further, we demonstrate that perimeter gating may be used to maintain a constant dark count rate across a wide temperature range, conferring stability to the RNG in that range. A set of debiased random bits from a tested prototype chip was benchmarked against the National Institute of Standards and Technology (NIST) Statistical Test Suite (STS) with a success rate of 99.375%.
Abstract True random number generators (TRNGs) allow the generation of true random bit sequences, guaranteeing the unpredictability and perfect balancing of the generated values. TRNGs can be realised from the sampling of quantum phenomena, for instance, the detection of single photons. Here, a recently proposed technique, which implements a quantum random number generator (QRNG) out of a device that was realised for a different scope, is further analysed and certified [1]. The combination of a CMOS single‐photon avalanche diode (SPAD) array, a high‐resolution time‐to‐digital converter (TDC) implemented on a field programmable gate array (FPGA), the exploitation of a single‐photon temporal degree of freedom, and an unbiased procedure provided by H. Zhou and J. Bruck [2, 3] allows the generation of true random bits with a high bitrate in a compact and easy‐to‐calibrate device. Indeed, the use of the ‘Zhou–Bruck’ method allows the removal of any correlation from the binary representation of decimal data. This perfectly fits with the usage of a device with non‐idealities like SPAD's afterpulses, pixel cross‐correlation, and time‐to‐digital converter non‐uniform conversion. In this work, an in‐depth analysis and certification of the technique presented in [1] is provided by processing the data with the NIST suite tests in order to prove the effectiveness and validity of this approach.
This dissertation is the result of research which, although electrical and computer engineering in nature, also aims to improve the performance of many systems in the field of quantum information. For example, random number generators are used in almost all areas of science, and the initial portion of this work details the theory, design, and characterization of two photon-arrival-time quantum random number generators (QRNGs). After the QRNGs were completed, it was realized that their performance was severely limited both by the maximum detection rate of the single-photon detectors used, and the precision at which the arrival times could be resolved. The single-photon detectors used for both QRNGs are single-photon avalanche photodiodes (SPADs), devices which when operated below their breakdown voltage can create a macroscopic amount of current (an avalanche) in response to a single incident photon. Some of this charge can become trapped in defects or impurities; if this trapped charge is released when the SPAD is active, a secondary ‘false’ detection event, or ‘afterpulse’ can occur. To lower the afterpulse probability to reasonable levels (< 1%), we attempted to reduce the amount of avalanche charge by halting its growth promptly with high-speed electronics, so that defects have a lower probability of becoming populated in the first place. Initial results show reductions in afterpulse probability by up to a factor of 12, corresponding to a ~20% decrease in dead time, a value that could be improved further. We developed an FPGA-based time-to-digital converter system for use specifically with SPADs, achieving a time-bin resolution of 100 ps, with lower dead time and higher maximum detection rate than all currently available detection systems. This further allowed for the creation of a new higher-order SPAD characterization technique, which was identified previously unknown subtleties to SPAD operation. Finally, we developed an ultra-low-latency QRNG, which was used in one of the recent loophole-free demonstrations of quantum nonlocality. The final latency was below 2.5 ns, to our knowledge the lowest latency QRNG to date. Of special interest, however, is our subsequent exploration into the characterization of its bit-probability drift using atomic clock stability techniques. By employing the Allan deviation and implementing precision feedback, the additional frequency drift caused by environmental fluctuations is reduced such that the resulting bit stream can pass cryptographic random number tests for sample sizes up to 5 Gb. This system is currently intended for the NIST random-number beacon, a world-wide trusted source of random bits.