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European Conference on Circuit Theory and Design

Study of nonlinear dynamics of LDPC decoders

Xia Zheng, Francis C. M. Lau, Chi Kong Tse, Siu‐Chung Wong

Published Oct 11, 2006• 5 citations
Publisher

Abstract

Low-density-parity-check (LDPC) codes have aroused much research interest because of their excellent bit error performance. The behaviour of the iterative LDPC decoders, however, has not been fully investigated at all signal-to-noise ratios (SNRs). By considering the LDPC decoders as high-dimensional nonlinear dynamical systems, we attempt to study the corresponding phase trajectories at different SNR values. By having an in-depth understanding of the decoder behaviour, engineers should be able to design more effective and efficient decoders.

DOI
10.1109/ecctd.2005.1523017

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Low-density-parity-check (LDPC) codes have aroused much research interest because of their excellent bit error performance. The behaviour of the iterative LDPC decoders, however, has not been fully investigated at all signal-to-noise ratios (SNRs). By considering the LDPC decoders as high-dimensional nonlinear dynamical systems, we attempt to study the corresponding phase trajectories at different SNR values. By having an in-depth understanding of the decoder behaviour, engineers should be able to design more effective and efficient decoders.
A class of error correction codes called ‘low-density parity-check (LDPC)’ codes have been the subject of a great deal of recent study in the coding community as a result of their ability to approach Shannon's fundamental capacity limit. Crucial to the performance of these codes is the use of an ‘iterative’ decoder. These iterative decoders are effectively high-dimensional, nonlinear dynamical systems and, consequently, control-theoretic tools are useful in analysing such decoders. The authors describe LDPC codes and the decoding algorithm and make a connection between the fixed points of the decoding algorithm and the well-known root locus plot. Through two examples of LDPC codes, the authors show that the root locus plot visually captures the bifurcation behaviour of iterative decoding that occurs at the signal-to-noise ratio predicted by Shannon's noisy channel coding theorem.
In this correspondence, a new method for improving hard-decision bit-flipping decoding of low-density parity-check (LDPC) codes is presented. Bits with a number of unsatisfied check sums larger than a predetermined threshold are flipped with a probability p /spl les/ 1 which is independent of the code considered. The probability p is incremented during decoding according to some rule. With a proper choice of the initial p, the proposed improved bit-flipping (BF) algorithm achieves gain not only in performance, but also in average decoding time for signal-to-noise ratio (SNR) values of interest with respect to p = 1.
Recently, low-density parity-check (LDPC) codes have attracted much attention because of their excellent error correcting performance and highly parallelizable decoding scheme. However, the effective VLSI implementation of and LDPC decoder remains a big challenge and is a crucial issue in determining how well we can exploit the benefits of the LDPC codes in the real applications. In this master thesis report, following a error coding background, we describe Low-Density Parity-Check codes and their decoding algorithm, and also requirements and architectures of LPDC decoder implementations.
A BP-based algorithm with 2-dimensional classified normalized correction is developed to reduce the complexity and improve the performance of decoding algorithm for the low density parity check (LDPC) codes. The algorithm first utilizes classification according to the absolute values of incoming messages in check nodes. Then it uses 2-dimensional normalization to correct the minimum and sub-minimum values. The 2-dimensional normalized factors can be calculated respectively by using probability and statistic theory in the initialization step. Simulation results illustrate that the proposed algorithm achieves better performance in bit error ratio (BER) and average iteration number than normalized BP-based algorithm in the high signal noise ratio (SNR) region, i.e., it can achieve 0.4 dB SNR gain and reduce 20% number of iterations at BER= 5 10  , whose complexity is also much less than that of belief propagation (BP) algorithm. It is concluded that the proposed algorithm offers better tradeoff between performance and complexity.  Index Terms—channel coding theory, density evolution, Iterative decoding algorithm