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arXiv:2610.10432

Dynamically protected erasure qubit via low-frequency charge driving

Ahmed Hajr, Ke Wang, Bingcheng Qing, Akel Hashim, Bibek Bhandari, Dominic Briseño-Colunga, Justin Dressel, Andrew N. Jordan, Irfan Siddiqi

quant-phSubmitted Oct 7, 2026• Announced Oct 8, 2026• 0 citations
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Abstract

Dynamical protection via strong driving can enable resilient quantum processing on imperfect physical hardware. However, the practical utility of such schemes is frequently limited by parasitic processes such as drive-induced dephasing and leakage. Here, we demonstrate that sub-GHz charge driving of superconducting Kerr oscillators (KOs) in the transmon regime circumvents this trade-off, simultaneously activating fast parametric interactions and protecting the encoded qubit from low-frequency noise. The key is the frequency dependence of the charge sensitivity: using the AC Stark shift as a probe, we find that the KO frequency sensitivity to a charge drive grows quadratically with both drive frequency and amplitude, making the oscillator weakly sensitive to $1/f$ charge noise yet strongly coupled to drives near 1~GHz. Exploiting this, we first demonstrate cooling and reset of the KO in 82~ns, to a residual population below $0.7\%$---lower than its $2.5\%$ steady-state thermal population. Next, using two KOs, we demonstrate logical control and dynamical protection of a dual-rail qubit with nearly fourfold erasure bias. Finally, using a single end-of-circuit erasure check, we achieve an error per Clifford of $5.6\times10^{-4}$, which falls to $1.5\times10^{-4}$ after post-selection, with 25~ns gates.

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Quantum error correction with erasure qubits promises significant advantages over standard error correction due to favorable thresholds for erasure errors. To realize this advantage in practice requires a qubit for which nearly all errors are such erasure errors, and the ability to check for erasure errors without dephasing the qubit. We demonstrate that a “dual-rail qubit” consisting of a pair of resonantly coupled transmons can form a highly coherent erasure qubit, where transmon T 1 errors are converted into erasure errors and residual dephasing is strongly suppressed, leading to millisecond-scale coherence within the qubit subspace. We show that single-qubit gates are limited primarily by erasure errors, with erasure probability p erasure = 2.19 ( 2 ) × 10 − 3 per gate while the residual errors are ∼ 40 times lower. We further demonstrate midcircuit detection of erasure errors while introducing < 0.1 % dephasing error per check. Finally, we show that the suppression of transmon noise allows this dual-rail qubit to preserve high coherence over a broad tunable operating range, offering an improved capacity to avoid frequency collisions. This work establishes transmon-based dual-rail qubits as an attractive building block for hardware-efficient quantum error correction. Published by the American Physical Society 2024

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Dynamical protection via strong driving can enable resilient quantum processing on imperfect physical hardware. However, the practical utility of such schemes is frequently limited by parasitic processes such as drive-induced dephasing and leakage. Here, we demonstrate that sub-GHz charge driving of superconducting Kerr oscillators (KOs) in the transmon regime circumvents this trade-off, simultaneously activating fast parametric interactions and protecting the encoded qubit from low-frequency noise. The key is the frequency dependence of the charge sensitivity: using the AC Stark shift as a probe, we find that the KO frequency sensitivity to a charge drive grows quadratically with both drive frequency and amplitude, making the oscillator weakly sensitive to 1/f1/f1/f charge noise yet strongly coupled to drives near 1GHz. Exploiting this, we first demonstrate cooling and reset of the KO in 82ns, to a residual population below 0.7%0.7\%0.7%---lower than its 2.5%2.5\%2.5% steady-state thermal population. Next, using two KOs, we demonstrate logical control and dynamical protection of a dual-rail qubit with nearly fourfold erasure bias. Finally, using a single end-of-circuit erasure check, we achieve an error per Clifford of 5.6×10−45.6\times10^{-4}5.6×10−4, which falls to 1.5×10−41.5\times10^{-4}1.5×10−4 after post-selection, with 25~ns gates.
Quantum error correction using erasure qubits offers higher fault-tolerant thresholds and improved scaling by converting dominant physical errors into detectable erasures. In superconducting circuits, erasure qubits can be constructed using the dual-rail approach, which, however, requires additional qubit-count overhead and tailored coupling elements. Here, we demonstrate a hardware-efficient scheme that operates transmon qutrits as erasure qubits, which is compatible with standard superconducting circuit-QED hardware. The logical states ∣0L⟩\ket{0_\text{L}}∣0L​⟩ and ∣1L⟩\ket{1_\text{L}}∣1L​⟩ are represented by the ground and second excited states, while the dominant relaxation errors can be detected via an ancilla qubit using a microwave-activated two-qutrit SWAP gate. We demonstrate a logical qubit T1T_1T1​ lifetime exceeding 500 μs500\,μ\mathrm{s}500μs, post-selected with repeated mid-circuit erasure detection, which is ten times longer than the T1T_1T1​ time of the transmon physical qubit. Coherence times beyond 300 μs300\,μ\mathrm{s}300μs are achieved using dynamical decoupling. Single-qubit gate operations reach average Clifford gate infidelity on the order of 10−410^{-4}10−4. We further demonstrate dual-purposing an ancilla qubit for both erasure detection and parity checking, showing heralded generation of Bell states between erasure qubits. These results suggest that mainstream architectures of transmon qubit arrays may already be capable of implementing erasure-based QEC strategies for hardware-efficient fault-tolerant quantum computing.
Erasure qubits -- qubits designed to have an error profile that is dominated by detectable leakage errors -- are a promising way to cut down the resources needed for quantum error correction. There have been several recent experiments demonstrating erasure qubits in superconducting quantum processors, most notably the dual-rail qubit defined by the one-photon subspace of two coupled cavities. An outstanding challenge is that the ancillary transmons needed to facilitate erasure checks and two-qubit gates introduce a substantial amount of noise, limiting the benefits of working with erasure-biased qubits. Here, we show how to suppress the adverse effects of transmon-induced noise while performing erasure checks or two-qubit gates. We present control schemes for these operations that suppress erasure check errors by three orders of magnitude and reduce the logical two-qubit gate infidelities by up to three orders of magnitude.
Increasing the fidelity of single-qubit gates requires a combination of faster pulses and increased qubit coherence. However, these requirements can be contradictory. Additionally, increasing the drive power can heat the qubit’s environment and degrade coherence. In this work, we circumvent this issue and achieve rapid gates by pumping a transmon’s native Kerr at approximately one third of the qubit’s resonant frequency. The subharmonic Rabi rate of the process is proportional to applied drive amplitude cubed, allowing for rapid gates. In addition, we demonstrate that filtering can be used to protect the qubit’s coherence while performing rapid gates. Single qubit gates as short as 37.4 ns are demonstrated with fidelity of 99.91%. We present theoretical calculations indicating that drive induced multi-photon decay will not limit qubit lifetime; calculated power absorption also indicates that this technique could reduce cryostat heating for fast gates, a vital requirement for large-scale quantum computers. There is a trade-off between achieving fast qubit control and preserving long qubit lifetimes. In this work, the authors demonstrate single qubit gates by driving a transmon qubit parametrically at 1/3 of its frequency, creating fast, high-fidelity gates while protecting the qubit lifetime and mitigating heating.
Quantum computing is a relatively new computing paradigm that leverages entanglement to implement algorithms beyond the reach of classical hardware. Superconducting quantum circuits have emerged as a platform to build quantum processors, with demonstrations of quantum supremacy over classical supercomputers and quantum error correction beyond fault tolerance. However, current noisy devices require significant improvements to unlock the full potential of quantum algorithms.This thesis investigates intrinsic noise channels in superconducting circuits and the design of noise-resilient qubits. By characterizing high-quality superconducting resonators, we identify lossy dielectric materials at the interfaces as the dominant loss mechanism, which we mitigate via targeted surface treatments. Subsequently, we leverage Josephson junction nonlinearity to engineer noise-biased qubits utilizing the Kerr parametric oscillator (KPO). By analyzing the efficiency of strong, far-off-resonance driving to facilitate three- and four-wave mixing processes, we demonstrate high-fidelity operations on Fock, Kerr-cat, and dual-rail qubits. For the Kerr-cat qubit, we introduce a novel 2D architecture that enables strong light-matter coupling with suppressed Purcell decay, yielding millisecond-scale bit-flip lifetimes. Within this same architecture, we demonstrate a longitudinal qubit readout with a 99.6%99.6\%99.6% quantum nondemolition score, alongside a high-fidelity universal single-qubit gate set, all while maintaining bit-flip error suppression. Finally, we exploit the efficient wave-mixing of strongly coupled, far-detuned KPOs to realize a dynamically protected dual-rail qubit exhibiting both erasure bias and high-fidelity single-qubit gates.
Abstract Achieving fast gates and long coherence times for superconducting qubits presents challenges, typically requiring either a stronger coupling of the drive line or an excessively strong microwave signal to the qubit. To address this, we introduce on-chip filters of the qubit drive exhibiting a stopband at the qubit frequency, thus enabling long coherence times and strong coupling at the subharmonic frequency, facilitating fast single-qubit gates, and reduced thermal load. The filters exhibit an extrinsic relaxation time of a few seconds while enabling sub-10-ns gates with subharmonic control. Here we show up to 200-fold improvement in the measured relaxation time at the stopband. Furthermore, we implement subharmonic driving of Rabi oscillations with a π pulse duration of 12 ns. Our demonstration of on-chip filters and efficient subharmonic driving in a two-dimensional quantum processor paves the way for a scalable qubit architecture with reduced thermal load and noise from the control line.
Quantum error correction with erasure qubits promises significant advantages over standard error correction due to favorable thresholds for erasure errors. To realize this advantage in practice requires a qubit for which nearly all errors are such erasure errors, and the ability to check for erasure errors without dephasing the qubit. We demonstrate that a “dual-rail qubit” consisting of a pair of resonantly coupled transmons can form a highly coherent erasure qubit, where transmon T 1 errors are converted into erasure errors and residual dephasing is strongly suppressed, leading to millisecond-scale coherence within the qubit subspace. We show that single-qubit gates are limited primarily by erasure errors, with erasure probability p erasure = 2.19 ( 2 ) × 10 − 3 per gate while the residual errors are ∼ 40 times lower. We further demonstrate midcircuit detection of erasure errors while introducing < 0.1 % dephasing error per check. Finally, we show that the suppression of transmon noise allows this dual-rail qubit to preserve high coherence over a broad tunable operating range, offering an improved capacity to avoid frequency collisions. This work establishes transmon-based dual-rail qubits as an attractive building block for hardware-efficient quantum error correction. Published by the American Physical Society 2024