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arXiv:2610.04731

Sum-of-squares compilation of matrix-model dynamics for NISQ and fault-tolerant hardware

Ayanendu Dutta, Nabanita Sarkar

quant-phhep-thSubmitted Oct 3, 2026• Announced Oct 6, 2026• 0 citations
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Abstract

The SU$(N)$ matrix-model potential $V=-\tfrac{g^2}{4}\sum_{I,J}Tr[X_I,X_J]^2$, the interaction of the BFSS/BMN family, whose thermal large-$N$ states are dual to black holes, is diagonal in the coordinate basis and is compiled in the literature as a phase polynomial with $O(d^2N^4Q^4)$ rotations per Trotter step. That cost is close to optimal for its gate class: we show that for a generic Trotter step the Walsh support $m_{\min}$ lower-bounds both the rotation count and the two-qubit count of every circuit over $\{CNOT,CZ,CPhase,R_{ZZ},SWAP,X,R_z\}$, ancillas included, and we build a parity network attaining $1.01$--$1.10\,m_{\min}$. Improvement therefore requires a gate outside that class, and the exact factorisation of $V$ into a sum of squared commutator entries supplies one in each era. For NISQ, Hadamard: each squared entry is added into a Fourier register and squared there, $Θ(d^2N^3Q^3)$ two-qubit gates. For fault tolerance, $T$: reversible arithmetic with one phase-gradient injection per squared entry, $Θ(d^2N^3Q^2)$ T gates and no arbitrary-angle rotation. Both are built and verified. With a native $R_{ZZ}$ the NISQ circuit uses fewer two-qubit gates than every parity network from $Q=6$ at SU(2) and $Q=2$ at SU(5); the oracle beats a precision-matched Hamming-weight-phasing incumbent at every point built except the smallest, by up to $11.9\times$ in T count and, at equal width, $25.5\times$ in surface-code spacetime. An ablation with the same arithmetic but no factorisation costs up to $21\times$ more and loses to that incumbent at $15$ of $17$ points, so the factorisation, not the arithmetic, produces the win. Both constructions survive the supersymmetric deformation to mini-BMN with fermions, and complete Trotter evolutions on a statevector simulator reproduce the exact product formula to $2\times10^{-12}$.

Comments
39 pages, 15 figures, 22 tables

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Fault-tolerant quantum computing requires translating application-level quantum circuits into the Clifford+TTT gate set, where the TTT gate is the dominant resource cost. Phase kickback is an ancilla-based technique that can dramatically reduce TTT-count for rotations with dyadic angles, but has previously been limited to highly structured circuit families. We present Dyadic Phase Fixing (DPF), a general multi-qubit synthesis tool that extends phase kickback to general quantum circuits. DPF uses numerical unitary synthesis to greedily extract dyadic angle rotations from any input circuit. Combined with a decision matrix to automatically size the final phase gradient register, our end-to-end workflow achieves up to 70% reduction in TTT-count compared to \texttt{gridsynth} and up to 60% compared to Repeat-Until-Success synthesis on a diverse set of benchmarks. We map these compiled circuits to a surface-code architecture to evaluate space-time volume, demonstrating up to a 60\% reduction in this metric as well. However, for some circuits and mapping strategies the two metrics diverge significantly, demonstrating that TTT-count alone is a useful but incomplete proxy for fault-tolerant program costs.
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