2-local qubit Hamiltonian simulation, a fundamental task in quantum computing, is widely applied in various applications. This paper presents QBX, the first quantum compiler designed for 2-local qubit Hamiltonian simulation on quantum chiplet architectures. Existing general-purpose quantum compilers for chiplet architectures target quantum programs at the gate level and miss optimizations requiring high-level semantics of Hamiltonian simulation. Conversely, existing domain-specific compilers for Hamiltonian simulation are designed for monolithic architectures, and their limited scalability and inability to adapt to the heterogeneity of chiplet architectures lead to sub-optimal circuit outputs. QBX implements a scalable hierarchical approach to reduce both the amount and distance of cross-chiplet communications. It integrates the highway mechanism, a chiplet-oriented solution for efficient long-range qubit communication, to diminish cross-chiplet interaction costs. Furthermore, QBX efficiently aggregates 2-local Pauli strings into multi-target controlled gates, harnessing highways for deep optimization. Our evaluations show that QBX markedly outperforms both general-purpose and domain-specific compilers in circuit depth and operation count, while scaling to much larger 2-local Hamiltonian simulations.
2-local qubit Hamiltonian simulation, a fundamental task in quantum computing, is widely applied in various applications. This paper presents QBX, the first quantum compiler designed for 2-local qubit Hamiltonian simulation on quantum chiplet architectures. Existing general-purpose quantum compilers for chiplet architectures target quantum programs at the gate level and miss optimizations requiring high-level semantics of Hamiltonian simulation. Conversely, existing domain-specific compilers for Hamiltonian simulation are designed for monolithic architectures, and their limited scalability and inability to adapt to the heterogeneity of chiplet architectures lead to sub-optimal circuit outputs. QBX implements a scalable hierarchical approach to reduce both the amount and distance of cross-chiplet communications. It integrates the highway mechanism, a chiplet-oriented solution for efficient long-range qubit communication, to diminish cross-chiplet interaction costs. Furthermore, QBX efficiently aggregates 2-local Pauli strings into multi-target controlled gates, harnessing highways for deep optimization. Our evaluations show that QBX markedly outperforms both general-purpose and domain-specific compilers in circuit depth and operation count, while scaling to much larger 2-local Hamiltonian simulations.
Simulating quantum systems is one of the most important potential applications of quantum computers. The high-level circuit defining the simulation needs to be compiled into one that complies with hardware limitations such as qubit architecture (connectivity) and instruction (gate) set. General-purpose quantum compilers work at the gate level and have little knowledge of the mathematical properties of quantum applications, missing further optimization opportunities. Existing application-specific compilers only apply advanced optimizations in the scheduling procedure and are restricted to the CNOT or CZ gate set. In this work, we develop a compiler, named 2QAN, to optimize quantum circuits for 2-local qubit Hamiltonian simulation problems, a framework which includes the important quantum approximate optimization algorithm (QAOA). In particular, we exploit the flexibility of permuting different operators in the Hamiltonian (no matter whether they commute) and propose permutation-aware techniques for qubit routing, gate optimization and scheduling to minimize compilation overhead. 2QAN can target different architectures and different instruction sets. Compilation results on four applications (up to 50 qubits) and three quantum computers (namely, Google Sycamore, IBMQ Montreal and Rigetti Aspen) show that 2QAN outperforms state-of-the-art general-purpose compilers and application-specific compilers. Specifically, 2QAN can reduce the number of inserted SWAP gates by 11.5X, reduce overhead in hardware gate count by 68.5X, and reduce overhead in circuit depth by 21X. Experimental results on the Montreal device demonstrate that benchmarks compiled by 2QAN achieve the highest fidelity.
As quantum computing advances toward fault-tolerance through quantum error correction, modular chiplet architectures have emerged to provide the massive qubit counts required while overcoming fabrication limits of monolithic chips. However, this transition introduces a critical compilation gap: existing frameworks cannot handle the scale of fault-tolerant quantum circuits while managing the noisy, sparse interconnects of chiplet backends.
We present Chipmunq, the first hardware-aware compiler for mapping and routing fault-tolerant circuits onto modular architectures. Chipmunq employs a quantum-error-correction-aware partitioning strategy that preserves the integrity of logical qubit patches, preventing prohibitive gate overheads common in general-purpose compilers. Our evaluation demonstrates that Chipmunq achieves a 13.5x speedup in compilation time compared to state-of-the-art tools. By incorporating chiplet constraints and defective qubits, it reduces circuit depth by 86.4% and SWAP gate counts by 91.4% across varying code distances. Crucially, Chipmunq overcomes heterogeneous inter-chiplet links, improving logical error rates by up to two orders of magnitude.
Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits would become a more severe bottleneck due to the long routing distances. In this paper, we propose a multi-entry communication highway (MECH) mechanism to trade ancillary qubits for program concurrency, and build a compilation framework to efficiently manage and utilize the highway resources. Our evaluation shows that this framework significantly outperforms the baseline approach in both the circuit depth and the number of operations on typical quantum benchmarks. This implies a more efficient and less error-prone compilation of quantum programs.
Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits would become a more severe bottleneck due to the long routing distances. In this paper, we propose a multi-entry communication highway (MECH) mechanism to trade ancillary qubits for program concurrency, and build a compilation framework to efficiently manage and utilize the highway resources. Our evaluation shows that this framework significantly outperforms the baseline approach in both the circuit depth and the number of operations on typical quantum benchmarks. This implies a more efficient and less error-prone compilation of quantum programs.
In this work, we introduce “Quantum-Chiplet”, a novel design flow for quantum circuits via a VLSI-like methodology. A large-scale quantum problem is hierarchically decomposed into several functions, or “chiplets,” and designed one by one. Each “chiplet” is initially represented with a behavior model without the need for quantum gate-level details, allowing for greater flexibility in designing arbitrary digital logic under any qubit count within a quantum environment. Focusing on behavior-level design, we also shorten the simulation time by more than an order of magnitude, as demonstrated by comparing the simulation time of QuantumChiplet to the conventional quantum simulator, Qiskit. To synthesize the design into real quantum gates, we leverage the conventional VLSI tool–Design Compiler for the automatic generation of quantum-gate-level design and automatically translate it into code interpretable by conventional quantum simulators. Moreover, Quantum-Chiplet utilizes matrices and the Python NumPy library for simulation. So even if suitable quantum gates are hard to find in existing libraries, simulations can still be done. These advancements, from bottom to top, pave the way for efficiently simulating and scaling up quantum circuits, and offer insight into electronic design automation for next-generation fault-tolerant quantum computing.
Quantum computers hold the promise of solving certain computational problems significantly faster than classical computers. Unlocking the full potential of quantum hardware depends on our ability to efficiently translate high-level quantum algorithms into executable sequences of quantum operations tailored to the specific constraints of a given device, a task known as quantum compilation. Among the most promising applications is the simulation of quantum systems, such as in quantum chemistry, where scalable, error resilient, and experimentally feasible Hamiltonian simulation techniques are essential. In the first part of this thesis, we present recent advances in the field of quantum compilation, emphasizing on efficient gate decomposition and circuit optimization. In particular, we analyze compilation techniques for Clifford circuits and general single-qubit rotations. Clifford operations play a central role in quantum error correction, the characterization of quantum devices and quantum cryptography. We explore asymptotically optimal decomposition methods, including constructions using either two-qubit gates or global entangling operations, the latter being especially well-suited for platforms like trapped ions. For single-qubit unitaries, we discuss approximation schemes that achieve the theoretically optimal scaling of gate count with respect to the desired precision. Beyond gate synthesis, we examine various hardware-aware optimization strategies aimed at reducing circuit depth and gate overhead. These include techniques for qubit routing in systems with limited connectivity, as well as methods for removing redundant operations. The second and primary, scientific contribution of this thesis focuses on implementation of effective many-body interactions on quantum hardware by combining the system’s native dynamics with control operations, which we call Hamiltonian engineering. Motivated by the central role of Hamiltonian simulation in quantum science, we introduce a general and efficient framework for synthesizing arbitrary target Hamiltonians under mild locality constraints. We propose a novel linear programming (LP) approach that computes pulse sequences consisting of single-qubit π or π/2 rotations applied at certain times during free evolution under the system’s native Hamiltonian. Our LP-based framework offers multiple advantages. First, its classical runtime depends only on the number and locality of the interactions in the system Hamiltonian, not directly on the overall system size. Second, we extend the method to include robustness against common error sources such as finite pulse time effects and systematic control errors, leveraging tools from average Hamiltonian theory and robust composite pulses. Our approach enables the efficient realization of high-fidelity Hamiltonian dynamics with minimal experimental overhead. The scalability of the approach are demonstrated through simulations, including the engineering of a random two-body Hamiltonian on a 225 qubit lattice in under a minute of classical preprocessing. In conclusion, this thesis contributes both theoretical insights and practical tools that bridge the gap between algorithm design and experimental implementation in quantum computing. The techniques developed here are directly applicable to a variety of platforms, including trapped ions, neutral atoms, and superconducting circuits. By advancing the frontiers of Hamiltonian engineering, this work enables more efficient, robust, and scalable quantum simulations on nearterm devices. Finally, it brings us closer to realizing quantum technologies, which are possibly capable of solving meaningful problems.