An important task in quantum computing is unitary circuit synthesis compatible with physical hardware constraints. This problem has a natural hybrid structure as local single-qubit gates are continuous variables on the Lie group $SU(2)$ while the entangling circuit structure is discrete and hardware-dependent. In this work, we use generative models to perform quantum circuit synthesis incorporating both the natural $SU(2)$ manifold geometry of quantum gates and hardware constraints that determine the overall circuit structure. Our model comprises two components: a circuit skeleton selector that chooses an entangling circuit and a diffusion model that generates quantum gates on the given circuit template by performing diffusion on the curved manifold $\mathrm{SU(2)} \simeq S^3$ itself. We demonstrate this approach with unitary compilation of physically motivated three-qubit Hamiltonian simulation targets such as the Transverse Field Ising Model and the Heisenberg-XXZ Model and show that Lie group diffusion outperforms comparable baselines. The synthesised circuits can also be customised subject to constraints, which we demonstrate by producing circuits with large and small gate rotation angles for the same target unitary evolution. We also investigate the fidelity-complexity frontier of the synthesised gates to demonstrate that the circuit selector learns to select circuits that balance fidelity with complexity rather than collapsing onto the most expansive entangling template. These results demonstrate that Lie group diffusion provides a natural generative framework for hardware-aware quantum circuit synthesis.
An important task in quantum computing is unitary circuit synthesis compatible with physical hardware constraints. This problem has a natural hybrid structure as local single-qubit gates are continuous variables on the Lie group SU(2) while the entangling circuit structure is discrete and hardware-dependent. In this work, we use generative models to perform quantum circuit synthesis incorporating both the natural SU(2) manifold geometry of quantum gates and hardware constraints that determine the overall circuit structure. Our model comprises two components: a circuit skeleton selector that chooses an entangling circuit and a diffusion model that generates quantum gates on the given circuit template by performing diffusion on the curved manifold SU(2)≃S3 itself. We demonstrate this approach with unitary compilation of physically motivated three-qubit Hamiltonian simulation targets such as the Transverse Field Ising Model and the Heisenberg-XXZ Model and show that Lie group diffusion outperforms comparable baselines. The synthesised circuits can also be customised subject to constraints, which we demonstrate by producing circuits with large and small gate rotation angles for the same target unitary evolution. We also investigate the fidelity-complexity frontier of the synthesised gates to demonstrate that the circuit selector learns to select circuits that balance fidelity with complexity rather than collapsing onto the most expansive entangling template. These results demonstrate that Lie group diffusion provides a natural generative framework for hardware-aware quantum circuit synthesis.
Abstract Quantum circuit synthesis becomes increasingly challenging as system sizes grow and hardware-native gate sets diversify. Denoising diffusion models have recently been applied to quantum circuit synthesis as an alternative to expensive classical optimization. Existing diffusion-based approaches, however, either operate on discrete gate alphabets or separate gate identities and continuous parameters into different generative streams, which raises the question of whether a unified representation can more naturally encode structure–parameter dependencies. We propose a hybrid diffusion–optimization framework for quantum circuit synthesis with continuous native gates. Taking a trapped-ion-inspired native gate set as a representative example, our single-stream diffusion model operates directly on a continuous-parameter gate set { R X ( θ ), R Y ( θ ), R XX ( θ )} and produces fully parameterized circuits in a single diffusion sampling run. A lightweight gradient-based post-optimization of the continuous parameters, based on the process infidelity, then corrects residual stochastic errors. Trained and evaluated on random three-qubit unitaries, the model generates compact circuits that accurately approximate unseen targets. Under identical training conditions, the continuous-gate formulation achieves substantially lower process infidelity than both random-circuit and a discrete-gate diffusion baseline. Furthermore, applying gradient-based post-optimization to the continuous-gate diffusion output yields a significant additional improvement in fidelity compared with the same model without post-optimization, demonstrating that this refinement step is an effective strategy for correcting residual stochastic errors in the diffusion-generated parameters. These results point to a practical route toward continuous-parameter quantum circuit synthesis in native gate sets.
High-fidelity circuit execution on noisy intermediate-scale quantum devices is bottlenecked by compilation pipelines that disregard complex, correlated noise. To address this, this methodology article proposes a quantum machine learning control (QMLC) framework for generative quantum circuit synthesis from gate-set tomography (GST) data that bypasses the traditional two-step pipeline of characterizing native quantum gates via GST followed by unitary decomposition algorithms. Instead, a generative concept space is directly learnt from GST data, enabling conditional synthesis of quantum circuits on a desired output distribution. Our approach tokenizes GST germ circuits and embeds them into a structured latent space using a curriculum-learning-motivated strategy, starting with short circuits and progressively incorporating longer ones with diverse output statistics. The embedded sequences are processed by a set-vision transformer with permutation-invariant pooling, producing k-seed vectors that represent the learned concept space of the quantum device. Aggregating data across multiple circuits makes this latent representation inherently context-aware, capturing the shared physical noise environment (e.g., crosstalk, drift) that isolated gate metrics miss. We propose an unconditional diffusion model to sample from the concept space. During inference, a user provides a target measurement distribution, and the model generates a corresponding circuit. To ensure fidelity and robustness, the output is denoised using a diffusion model that operates on the target conditional covariance matrix. This end-to-end framework is a step towards context-aware, hardware-native circuit synthesis directly from raw GST data, which offers a new paradigm for integrating quantum control and compilation. The QMLC framework is particularly suited for near-term quantum devices with complex calibration procedures.
Abstract Efficiently compiling quantum operations remains a major bottleneck in scaling quantum computing. Today’s state-of-the-art methods achieve low compilation error by combining search algorithms with gradient-based parameter optimization, but they incur long runtimes and require multiple calls to quantum hardware or expensive classical simulations, making their scaling prohibitive. Recently, machine-learning models have emerged as an alternative, though they are currently restricted to discrete gate sets. Here, we introduce a multimodal denoising diffusion model that simultaneously generates a circuit’s structure and its continuous parameters for compiling a target unitary. It leverages two independent diffusion processes, one for discrete gate selection and one for parameter prediction. We benchmark the model over different experiments, analyzing the method’s accuracy across varying qubit counts and circuit depths, showcasing the ability of the method to outperform existing approaches in gate counts and under noisy conditions. Additionally, we show that a simple post-optimization scheme allows us to significantly improve the generated ansätze. Finally, by exploiting its rapid circuit generation, we create large datasets of circuits for particular operations and use these to extract valuable heuristics that can help us discover new insights into quantum circuit synthesis. Code and models are publicly available at https://github.com/FlorianFuerrutter/genQC .
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block optimization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noise simulations, and large-size circuits on analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compilers such as t|ket>. When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits. Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation toolchain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block opti-mization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noisy simulations, and large-size circuits on analytical models. Our technique can be applied after existing optimizations to achieve higher circuit fidelity. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compiler optimizations such as t|ket). When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits, Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation tool chain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains to further improve the circuit fidelity.
The synthesis of quantum circuits, crucial for realizing quantum algorithms, faces significant challenges in satisfying both functional requirements and physical limitations inherent in quantum hardware. Traditional circuit synthesis methods often struggle to efficiently explore the vast design space while adhering to constraints such as gate fidelity, qubit connectivity, and circuit depth. This work explores the application of Generative Adversarial Networks (GANs) to automate quantum circuit synthesis, directly incorporating physical constraints into the learning process. We propose a framework where a generator network creates quantum circuits, and a discriminator network evaluates these circuits against a defined set of physical constraints. Through adversarial training, the generator learns to produce circuits that are not only functionally correct but also physically realizable, offering a novel approach to quantum circuit design. The core claim of this research is that GANs can be effectively trained to generate quantum circuits satisfying both functional requirements and physical constraints. This approach represents a significant step towards practical quantum circuit synthesis, addressing a critical bottleneck in the development of quantum computing.