Efficient classical simulation of quantum Hamiltonian dynamics is often bottlenecked by exponential state growth and the overhead of generic sparse linear algebra. We introduce diagonal-budgeted Trotterization, a structure-aware strategy that decomposes Hamiltonians into factors preserving diagonal sparsity while tightly controlling fidelity loss.
Our implementation, HamSim, utilizes a compact diagonal-sparse data layout and specialized C++/CUDA kernels to bypass the overheads of generic formats like CSR. By leveraging SIMD vectorization, multithreading, and GPU acceleration, HamSim achieves high performance across heterogeneous architectures. Benchmarks on the HamLib suite show that HamSim significantly outperforms Qiskit-Aer. On CPUs, HamSim attains speedups of $182$--$1,269\times$ on optimization instances (TSP, MaxCut) and $4.8$--$841\times$ on physical models (TFIM, Heisenberg). On GPUs, it achieves up to $178\times$ speedup for $12$--$16$ qubit problems.
Unlike traditional Trotterization, HamSim maintains near-perfect fidelity without requiring exponential steps. This demonstrates that diagonal-aware numerical kernels provide a scalable foundation for high-fidelity classical Hamiltonian simulation.
Journal reference
Proc. 40th ACM International Conference on Supercomputing (ICS '26), 2026, pp. 1350-1362
Efficient classical simulation of quantum Hamiltonian dynamics is often bottlenecked by exponential state growth and the overhead of generic sparse linear algebra. We introduce diagonal-budgeted Trotterization, a structure-aware strategy that decomposes Hamiltonians into factors preserving diagonal sparsity while tightly controlling fidelity loss.
Our implementation, HamSim, utilizes a compact diagonal-sparse data layout and specialized C++/CUDA kernels to bypass the overheads of generic formats like CSR. By leveraging SIMD vectorization, multithreading, and GPU acceleration, HamSim achieves high performance across heterogeneous architectures. Benchmarks on the HamLib suite show that HamSim significantly outperforms Qiskit-Aer. On CPUs, HamSim attains speedups of 182--1,269× on optimization instances (TSP, MaxCut) and 4.8--841× on physical models (TFIM, Heisenberg). On GPUs, it achieves up to 178× speedup for 12--16 qubit problems.
Unlike traditional Trotterization, HamSim maintains near-perfect fidelity without requiring exponential steps. This demonstrates that diagonal-aware numerical kernels provide a scalable foundation for high-fidelity classical Hamiltonian simulation.
Quantum Hamiltonian simulation is one of the most promising applications of quantum computing and forms the basis for many quantum algorithms. Benchmarking them is an important gauge of progress in quantum computing technology. We present a methodology and software framework to evaluate various facets of the performance of gate-based quantum computers on Trotterized quantum Hamiltonian evolution. We propose three distinct modes for benchmarking: (i) comparing simulation on a real device to that on a noiseless classical simulator, (ii) comparing simulation on a real device with exact diagonalization results, and (iii) using scalable mirror circuit techniques to assess hardware performance in scenarios beyond classical simulation methods. We demonstrate this framework on five Hamiltonian models from the HamLib library: the Fermi and Bose-Hubbard models, the transverse field Ising model, the Heisenberg model, and the Max3SAT problem. Experiments were conducted using Qiskit's Aer simulator, BlueQubit's CPU cluster and GPU simulators, and IBM's quantum hardware. Our framework, extendable to other Hamiltonians, provides comprehensive performance profiles that reveal hardware and algorithmic limitations and measure both fidelity and execution times, identifying crossover points where quantum hardware outperforms CPU/GPU simulators.
Simulating quantum many-body dynamics is important both for fundamental understanding of physics and practical applications for quantum information processing. Therefore, classical simulation methods have been developed so far. Specifically, the Trotter-Suzuki decomposition can analyze a highly complex quantum dynamics, if the number of qubits is sufficiently small so that main memory can store the state vector. However, simulation of quantum dynamics via Trotter-Suzuki decomposition requires a huge number of steps, each of which accesses the state vector, and hence the simulation time becomes impractically long. To settle this issue, we propose a technique to accelerate simulation of quantum dynamics via simultaneous diagonalization of mutually commuting Pauli groups, which is also attracting a lot of attention to reduce the measurement overheads in quantum algorithms. We group the Hamiltonian into mutually commuting Pauli strings, and each of them is diagonalized in the computational basis via a Clifford transformation. Since diagonal operators are applied on the state vector simultaneously with minimum memory access, this method successfully uses performance of highly parallel processors such as Graphics Processing Units (GPU). Compared to both CPU and GPU implementations using fast quantum circuit simulator “qulacs,” the numerical experiments have shown that our method provides a few tens of times acceleration.
Classical simulation of quantum circuits remains indispensable for algorithm development, hardware validation, and error analysis in the noisy intermediate-scale quantum (NISQ) era. However, state-vector simulation faces exponential memory scaling, with an n-qubit system requiring O(2^n) complex amplitudes, and existing simulators often lack the flexibility to exploit heterogeneous computing resources at runtime. This paper presents a GPU-accelerated quantum circuit simulation framework that introduces three contributions: (1) an empirical backend selection algorithm that benchmarks CuPy, PyTorch-CUDA, and NumPy-CPU backends at runtime and selects the optimal execution path based on measured throughput; (2) a directed acyclic graph (DAG) based gate fusion engine that reduces circuit depth through automated identification of fusible gate sequences, coupled with adaptive precision switching between complex64 and complex128 representations; and (3) a memory-aware fallback mechanism that monitors GPU memory consumption and gracefully degrades to CPU execution when resources are exhausted. The framework integrates with Qiskit, Cirq, PennyLane, and Amazon Braket through a unified adapter layer. Benchmarks on an NVIDIA A100-SXM4 (40 GiB) GPU demonstrate speedups of 64x to 146x over NumPy CPU execution for state-vector simulation of circuits with 20 to 28 qubits, with speedups exceeding 5x from 16 qubits onward. Hardware validation on an IBM quantum processing unit (QPU) confirms Bell state fidelity of 0.939, a five-qubit Greenberger-Horne-Zeilinger (GHZ) state fidelity of 0.853, and circuit depth reduction from 42 to 14 gates through the fusion pipeline. The system is designed for portability across NVIDIA consumer and data-center GPUs, requiring no vendor-specific compilation steps.
High-performance techniques to simulate quantum programs on classical hardware rely on exponentially large vectors to represent quantum states. When simulating quantum algorithms, the quantum states that occur are often sparse due to special structure in the algorithm or even in the underlying problem. We thus introduce a new simulation method that exploits this sparsity to reduce memory usage and simulation runtime. Moreover, our prototype implementation includes optimizations such as gate (re)scheduling, which amortizes data structure accesses and reduces memory usage. To benchmark our implementation, we run quantum algorithms for factoring, for computing integer and elliptic curve discrete logarithms, and for chemistry. Our simulator successfully runs a factoring instance of a 20-bit number using 102 qubits, and elliptic curve discrete logarithm over a 10-bit curve with 110 qubits. While previous work needed a supercomputer to simulate such instances of factoring, our approach succeeds in less than four minutes using a single core and less than 100 MB of memory. To the best of our knowledge, we are the first to fully simulate a quantum algorithm to compute elliptic curve discrete logarithms.
In the current era of Noisy Intermediate Scale Quantum (NISQ) computing, efficient digital simulation of quantum systems holds significant importance for quantum algorithm development, verification and validation. However, analysis of sparsity within these simulations remains largely unexplored. In this paper, we present a novel observation regarding the prevalent sparsity patterns inherent in quantum circuits. We introduce DiaQ, a new sparse matrix format tailored to exploit this quantum-specific sparsity, thereby enhancing simulation performance. Our contribution extends to the development of libdiaq, a numerical library implemented in C++ with OpenMP for multi-core acceleration and SIMD vectorization, featuring essential mathematical kernels for digital quantum simulations. Furthermore, we integrate DiaQ with SV-Sim, a state vector simulator, yielding substantial performance improvements across various quantum circuits (e.g., ~26.67% for GHZ-28 and ~32.72% for QFT-29 with multi-core parallelization and SIMD vectorization on Frontier). Evaluations conducted on benchmarks from SupermarQ and QASMBench demonstrate that DiaQ represents a significant step towards achieving highly efficient quantum simulations.
This work presents a portable, modular quantumcircuit emulator designed to accelerate algorithm prototyping by leveraging Central Processing Unit (CPU) and Compute Unified Device Architecture (CUDA)-enabled Graphic Processing Unit (GPU) backends for dense linearalgebra workloads.The emulator provides a lightweight backend abstraction that unifies NumPy and CuPy, supports both statevector and density-matrix representations, and implements efficient multi-target unitary embedding and Kraus-map noise channels.These capabilities enable rapid exploration of quantum algorithms that require full 2 n × 2 n operators, such as quantum phase estimation, full Quantum Fourier Transform (QFT), and noise-aware variational circuits, while minimizing host/device transfer and preserving numerical parity between backends.Implementation strategies are described for embedding single-and multi-qubit gates, parameterized rotations, and controlled unitaries, along with an "apply_unitary_on_targets" routine that employs reshape/matrix-multiply/reshape patterns to map arbitrary target sets to dense GPU kernels for high throughput.Using a curated benchmark suite of dense quantum workloads and microbenchmarks, including large matrix multiplies and Fast Fourier Transforms (FFT), performance is quantified across a range of qubit counts and precisions.The results demonstrate substantial speedups on modern NVIDIA GPUs for workloads dominated by dense linear algebra, identify cross-over points where GPU acceleration becomes beneficial, and analyse memory/precision trade-offs for complex64 versus complex128.The presented emulator lowers the barrier for noise-aware algorithm prototyping by combining practical software ergonomics with GPU performance, enabling faster iteration on algorithm design and noise-mitigation strategies on commodity single-node hardware.While the abstraction layer ensures portability, achieving peak performance currently requires hardwarespecific tuning-a limitation we address through future automation strategies.