Device-aware quantum simulation increasingly requires HPC-scale accelerators, yet secure supercomputers expose batch-scheduled execution environments rather than the interactive, backend-oriented interfaces expected by quantum software. The key obstacle is not only remote job submission: an HPC-hosted virtual QPU must preserve topology, native-gate, and calibration semantics across queue delay, scheduler allocation, compute-node isolation, and partial execution-side failures, without opening inbound paths into the cluster.
We present HPC-vQPU, a service-export architecture for virtual QPUs on batch-scheduled HPC systems. HPC-vQPU separates a cloud-facing control plane, which owns device identity, task lifecycle, snapshot binding, and event projection, from an HPC-resident execution plane, which claims work and realises it through scheduler-backed GPU jobs. Coordination is exclusively outbound and agent initiated. The central abstraction is a topology- and calibration-aware device snapshot bound atomically at claim time and carried into execution as an immutable contract, making each scheduled job hermetic while preserving fresh device semantics.
We implement HPC-vQPU at the Pawsey Supercomputing Research Centre using Setonix GPUs, Qiskit-Aer/cuQuantum, and IBM Fez calibration data. Production experiments show that service overhead is bounded and additive, while workload scaling remains confined to the simulator; calibration-bearing snapshots produce measurable output shifts; claim-time binding prevents stale execution after pre-claim device mutation; concurrent agents complete 50/50 tasks exactly once; and explicit recovery restores stale running tasks after agent failure. These results show that secure, scheduler-mediated HPC infrastructure can export device-faithful quantum simulation as an interactive virtual-QPU service.
Device-aware quantum simulation increasingly requires HPC-scale accelerators, yet secure supercomputers expose batch-scheduled execution environments rather than the interactive, backend-oriented interfaces expected by quantum software. The key obstacle is not only remote job submission: an HPC-hosted virtual QPU must preserve topology, native-gate, and calibration semantics across queue delay, scheduler allocation, compute-node isolation, and partial execution-side failures, without opening inbound paths into the cluster.
We present HPC-vQPU, a service-export architecture for virtual QPUs on batch-scheduled HPC systems. HPC-vQPU separates a cloud-facing control plane, which owns device identity, task lifecycle, snapshot binding, and event projection, from an HPC-resident execution plane, which claims work and realises it through scheduler-backed GPU jobs. Coordination is exclusively outbound and agent initiated. The central abstraction is a topology- and calibration-aware device snapshot bound atomically at claim time and carried into execution as an immutable contract, making each scheduled job hermetic while preserving fresh device semantics.
We implement HPC-vQPU at the Pawsey Supercomputing Research Centre using Setonix GPUs, Qiskit-Aer/cuQuantum, and IBM Fez calibration data. Production experiments show that service overhead is bounded and additive, while workload scaling remains confined to the simulator; calibration-bearing snapshots produce measurable output shifts; claim-time binding prevents stale execution after pre-claim device mutation; concurrent agents complete 50/50 tasks exactly once; and explicit recovery restores stale running tasks after agent failure. These results show that secure, scheduler-mediated HPC infrastructure can export device-faithful quantum simulation as an interactive virtual-QPU service.
GPU-Accelerated quantum simulation is essential for NISQ-era research, but the HPC systems best suited to these workloads expose an operating model oriented toward security and scheduling. That model is poorly aligned with the interactive, device-oriented workflows expected by quantum software. We present HPC-vQPU, a two-plane architecture that exports HPC-hosted simulation as a virtual-QPU service without weakening the site's security posture. A cloud-facing control plane exposes a device-oriented REST API for circuit submission, lifecycle tracking, and event streaming; an unprivileged loginnode agent polls outward, atomically claims tasks, and dispatches scheduler-backed GPU work. A topology-and calibration-Aware device snapshot is bound at claim time and carried into each GPU job as a self-contained input, decoupling execution from live server contact while preserving calibration fidelity across scheduling delay. Deployed on Pawsey's Setonix supercomputer with NVIDIA Grace Hopper nodes, Qiskit-Aer/cuQuantum, and real IBM Fez calibration data for a 156-qubit heavy-hex device, HPC-vQPU adds only 2.0-3.4 s of interface-visible overhead in our deployment (3.4-5.9% of end-To-end latency) for 28-32 qubit circuits. The bound snapshot measurably changes output distributions, device state is fixed at claim rather than submission time, and task lifecycle consistency is preserved through agent failure and multi-Agent contention without privileged deployment or firewall changes.
High-performance computing (HPC) has evolved over decades through multiple architectural transitions, from vector supercomputers to massively parallel CPU clusters and GPU-accelerated systems, continuously expanding the frontier of scientific discovery. With the emergence of quantum processing units (QPUs) as practical computational accelerators, a new opportunity arises to further extend this trajectory by integrating quantum and classical computing paradigms. Building on the emerging vision of Quantum Integrated High-Performance Computing (QHPC), this paper contributes a full-stack layered architecture that integrates QPUs as first-class accelerators within, not merely alongside, the classical HPC software and hardware stack, with tight, on-premise quantum-classical coupling as its defining characteristic. The architecture comprises of unified resource management, quantum-aware scheduling, hybrid workflow orchestration, middleware and programming abstraction, interconnect technologies, and a tiered execution model enabling seamless workload partitioning across classical and quantum backends. A central aspect of this architecture is a strong user requests abstraction layer that exposes heterogeneous resources through a unified job submission interface, similar in spirit to existing schedulers such as Slurm, allowing users to describe workloads in a consistent template independent of underlying compute type or location. Drawing insights from prior accelerator integration eras, we outline how QHPC can support emerging workloads in quantum chemistry, materials discovery, combinatorial optimization, and climate modeling. We conclude by highlighting open challenges in building scalable, reliable, and programmable quantum-classical infrastructures that seamlessly connect global users to heterogeneous compute resources for future quantum-classical HPC ecosystems.
High-performance computing (HPC) has evolved over decades through multiple architectural transitions, from vector supercomputers to massively parallel CPU clusters and GPU-accelerated systems, continuously expanding the frontier of scientific discovery. With the emergence of quantum processing units (QPUs) as practical computational accelerators, a new opportunity arises to further extend this trajectory by integrating quantum and classical computing paradigms. Building on the emerging vision of Quantum Integrated High-Performance Computing (QHPC), this paper contributes a full-stack layered architecture that integrates QPUs as first-class accelerators within, not merely alongside, the classical HPC software and hardware stack, with tight, on-premise quantum–classical coupling as its defining characteristic. The architecture comprises of unified resource management, quantum-aware scheduling, hybrid workflow orchestration, middleware and programming abstraction, interconnect technologies, and a tiered execution model enabling seamless workload partitioning across classical and quantum backends. A central aspect of this architecture is a strong user requests abstraction layer that exposes heterogeneous resources through a unified job submission interface, similar in spirit to existing schedulers such as Slurm, allowing users to describe workloads in a consistent template independent of underlying compute type or location. Drawing insights from prior accelerator integration eras, we outline how QHPC can support emerging workloads in quantum chemistry, materials discovery, combinatorial optimization, and climate modeling. We conclude by highlighting open challenges in building scalable, reliable, and programmable quantum–classical infrastructures that seamlessly connect global users to heterogeneous compute resources for future quantum–classical HPC ecosystems.
As quantum computing (QC) technologies mature, their integration into established high-performance computing (HPC) infrastructures is becoming a central objective for next-generation computing systems. However, unlocking the potential of hybrid platforms for computationally demanding workloads remains challenging. The mismatch between quantum and classical programming models, the limited maturity of quantum software stacks, and the scarcity of quantum processing units (QPUs) above all, necessitate scheduling strategies that go beyond standard HPC mechanisms to manage such heterogeneous and constrained resources.
To address this issue, we investigate three distinct methodologies for HPC-QC resource scheduling: time-based multiplexing, dynamic resource management, and workflow decomposition. Experimental validation on production HPC clusters and real quantum hardware demonstrates the effectiveness of these approaches under different workload scenarios. Malleability and workflow strategies significantly optimize classical resource utilization, reducing consumption by up to 45.7% and 64% respectively, proving to be best fitted for hybrid jobs where quantum and classical workloads are evenly balanced. Conversely, time-multiplexing enhances QPU utilization and reduces execution time at the cluster level, making it the optimal strategy for the opposite context, which is characterized by high classical-quantum workload imbalances. These findings underscore the practical viability of tailored scheduling strategies for hybrid HPC-QC environments and highlight their complementarity in building efficient, scalable software stacks for next-generation quantum-accelerated facilities.
As quantum computing systems continue to scale up and become more clustered, efficiently compiling user quantum programs into high-fidelity executable sequences on real hardware remains a key challenge for current quantum compilation systems. In this study, we introduce a system-software framework that integrates resource virtualization and hardware-aware compilation for real quantum computing processors, termed QSteed. QSteed virtualizes quantum processors through a 4-layer abstraction hierarchy comprising the real quantum processing unit (QPU), standard QPU (StdQPU), substructure of the QPU (SubQPU), and virtual QPU (VQPU). These abstractions, together with calibration data, device topology, and noise descriptors, are maintained in a dedicated database to enable unified and fine-grained management across superconducting quantum platforms. At run time, the modular compiler queries the database to match each incoming circuit with the most suitable VQPU, after which it confines layout, routing, gate resynthesis, and noise-adaptive optimizations to that virtual subregion. The complete stack has been deployed on the Quafu superconducting cluster, where experimental runs confirm the correctness of the virtualization model and the efficacy of the compiler without requiring modifications to user code. By integrating resource virtualization with a select-then-compile workflow, QSteed demonstrates a robust architecture for compiling programs on noisy superconducting processors. This architectural approach offers a promising path toward efficient compilation needs across various superconducting quantum computing platforms in the noisy intermediate-scale quantum era.
Quantum computers are moving into HPC centers, and the main challenge is now integration rather than pure hardware access. Many current software paths still depend on vendor-specific adapter chains between user SDKs, schedulers, and backend APIs. This pattern makes operations more complex than necessary and slows the transition from pilots to production workflows. We present a practical integration path centered on the Quantum Device Management Interface (QDMI). Using IQM superconducting systems as a hardware case study, we implement an IQM-backed QDMI layer and connect it to two software layers that HPC centers working with quantum computers already care about: Slurm-based job execution and Qiskit-facing user workflows. The implementation is publicly available at https://github.com/iqm-finland/QDMI-on-IQM. The key message is simple: integrating quantum hardware into HPC does not have to be a bespoke engineering effort for each backend. Once the software-hardware boundary is standardized, large parts of the stack become reusable across providers and deployment styles. Our results do not claim that standardization eliminates all HPCQC challenges. They show that this specific boundary can already be standardized today in a way that is practical for users, operators, and vendors.