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arXiv:2603.21499

Optimal Compilation of Syndrome Extraction Circuits for General Quantum LDPC Codes

Kai Zhang, Dingchao Gao, Zhaohui Yang, Runshi Zhou, Fangming Liu, Zhengfeng Ji, Jianxin Chen

quant-phcs.ETSubmitted Mar 23, 2026• Announced Mar 24, 2026• 0 citations
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Abstract

Quantum error correcting codes (QECC) are essential for constructing large-scale quantum computers that deliver faithful results. As strong competitors to the conventional surface code, quantum low-density parity-check (qLDPC) codes are emerging rapidly: they offer high encoding rates while maintaining reasonable physical-qubit connectivity requirements. Despite the existence of numerous code constructions, a notable gap persists between these designs -- some of which remain purely theoretical -- and their circuit-level deployment. In this work, we propose Auto-Stabilizer-Check (ASC), a universal compilation framework that generates depth-optimal syndrome extraction circuits for arbitrary qLDPC codes. ASC leverages the sparsity of parity-check matrices and exploits the commutativity of X and Z stabilizer measurement subroutines to search for optimal compilation schemes. By iteratively invoking an SMT solver, ASC returns a depth-optimal solution if a satisfying assignment is found, and a near-optimal solution in cases of solver timeouts. Notably, ASC provides the first definitive answer to one of IBM's open problems: for all instances of bivariate bicycle (BB) code reported in their work, our compiler certifies that no depth-6 syndrome extraction circuit exists. Furthermore, by integrating ASC with an end-to-end evaluation framework -- one that assesses different compilation settings under a circuit-level noise model -- ASC reduces circuit depth by approximately 50% and achieves an average 7x-8x suppression of the logical error rate for general qLDPC codes, compared with as-soon-as-possible (ASAP) and coloration-based scheduling. ASC thus substantially reduces manual design overhead and demonstrates its strong potential to serve as a key component in accelerating hardware deployment of qLDPC codes.

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DATE 2026

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Quantum error correcting codes (QECC) are essential for constructing large-scale quantum computers that deliver faithful results. As strong competitors to the conventional surface code, quantum low-density parity-check (qLDPC) codes are emerging rapidly: they offer high encoding rates while maintaining reasonable physical-qubit connectivity requirements. Despite the existence of numerous code constructions, a notable gap persists between these designs -- some of which remain purely theoretical -- and their circuit-level deployment.
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Quantum low-density parity-check (qLDPC) codes offer a promising route to scalable fault-tolerant quantum computing, but their practical implementation requires efficient circuits for syndrome extraction. Many qLDPC families are assembled from a small set of components through explicit operations that imprint edge symmetries on their Tanner graphs. We show that disassembling the code by quotienting its symmetries one at a time, reduces parity-check circuit design to a much smaller problem acting only on the underlying components. Solutions to the reduced problem can then be lifted to the full code, yielding circuit constructions that apply to entire families of codes built from the same components. For lifted-product codes, our approach provides an optimal analytical construction for parity-check circuits achieving the lower bound on CNOT depth. We obtain analogous constructions for balanced-product codes and quantum--classical homological product codes. For quantum Tanner codes, the reduced problem is small enough to solve numerically, reaching the CNOT-depth lower bound for nearly all instance tested, including codes with up to 576 data qubits.
Suppressing errors is the central challenge for useful large-scale quantum computing. While quantum error correction promises a viable solution to this challenge, existing codes typically suffer from trade-offs among encoding efficiency, error threshold, and hardware feasibility. Here, we introduce Cornucopia codes, a family of practical, hardware-efficient quantum low-density parity-check codes that achieve an ultra-high encoding rate exceeding 1/21/21/2 while maintaining a pseudo-threshold exceeding 0.4%0.4\%0.4% under the standard circuit-level noise model. Inspired by recent affine-permutation-based code constructions and the long-range connectivity available in reconfigurable neutral-atom arrays, we adopt a structured code geometry in which the code layout, atom rearrangement, and syndrome-extraction schedule are co-designed. This structure enables nonlocal syndrome measurements through simple, parallel atom rearrangements. A complete syndrome extraction cycle measures all XXX- and ZZZ-type checks in parallel with 121212 entangling layers, independent of the code size. The resulting threshold is comparable to those of the surface code and bivariate bicycle codes. In particular, a single code block [[2844,1426,18]][[2844,1426,18]][[2844,1426,18]] encodes 1,4261{,}4261,426 distance-181818 logical qubits, achieving an extrapolated logical error rate of 2.6×10−162.6\times10^{-16}2.6×10−16 (1.9×10−311.9\times10^{-31}1.9×10−31) per logical qubit per cycle, assuming the physical error rate of 0.1%0.1\%0.1% (0.01%0.01\%0.01%). By comparison, a bivariate bicycle code implementation would require more than 68,00068{,}00068,000 physical qubits to encode the same number of logical qubits at a comparable logical error rate. These results bring demonstrations of ultra-low-overhead quantum error correction within the reach of near-term quantum processors.
Quantum error correction is essential for building utility-scale quantum computers that outperform classical machines, yet leading approaches incur substantial physical qubit overhead. Quantum low-density parity check (QLDPC) codes offer a promising alternative by significantly reducing the number of physical qubits required per logical qubit. However, existing work on QLDPC codes has focused primarily on quantum memories, with no efficient method known for implementing arbitrary logical Clifford operations at low circuit depth. Here, we introduce a new family of QLDPC codes that enables efficient implementation of the full Clifford group via transversal operations, allowing any m-qubit Clifford operation to be executed in at most O(m) syndrome extraction rounds. We run circuit-level simulations of depth-126 logical circuits to demonstrate the near-memory logical performance of these logical operations. In combination with known methods for implementing T gates, these results establish QLDPC codes as a viable route toward resource-efficient universal quantum computation. Quantum LDPC codes can shield quantum computers from decoherence with minimal overhead. In this work, the authors describe a new QLDPC family, SHYPS, as a path to practical fault tolerance with efficient Clifford circuit implementation on encoded states.
Quantum low-density parity-check (qLDPC) codes have emerged as a promising approach for realizing low-overhead logical quantum memories. Recent theoretical developments have established shift automorphisms as a fundamental building block for completing the universal set of logical gates for qLDPC codes. However, practical challenges remain because the existing SWAP-based shift automorphism yields logical error rates that are orders of magnitude higher than those for fault-tolerant idle operations. In this work, we address this issue by dynamically varying the syndrome measurement circuits to implement the shift automorphisms without reducing the circuit distance. We benchmark our approach on both twisted and untwisted weight-6 generalized toric codes, including the gross code family. Our time-dynamic circuits for shift automorphisms achieve performance comparable to the idle operations under the circuit-level noise model (SI1000). Specifically, the dynamic circuits achieve more than an order of magnitude reduction in logical error rates relative to the SWAP-based scheme for the gross code at a physical error rate of 10−310^{-3}10−3, employing the BP-OSD decoder. Our findings improve both the error resilience and the time overhead of the shift automorphisms in qLDPC codes. Furthermore, our work can lead to alternative syndrome extraction circuit designs, such as leakage removal protocols, providing a practical pathway to utilizing dynamic circuits that extend beyond surface codes towards qLDPC codes.