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arXiv:2510.04594 · Quantum Information Processing

Embedding-aware noise modeling of quantum annealing

Seon-Geun Jeong, Dinh Cong Mai, Dae-Il Noh, Quoc‐Viet Pham, Won–Joo Hwang

Published Sep 16, 2026• 0 citations
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Abstract

Quantum annealing provides a practical realization of adiabatic quantum computation and has emerged as a promising approach for solving large-scale combinatorial optimization problems. However, current devices remain constrained by sparse hardware connectivity, which requires embedding logical variables into chains of physical qubits. This embedding overhead limits scalability and reduces reliability as longer chains are more prone to noise-induced errors. In this work, we develop an embedding-aware baseline noise framework that connects chain-length growth to accumulated integrated-control-error variance, chain break probability (CBP), chain break fraction (CBF), and chain-strength scaling. We distinguish a moment-level uncorrelated ICE baseline, which yields a linear variance law, from a Gaussian closure that gives a closed-form erfc approximation for CBP. Experiments on the D-Wave Advantage2 Zephyr processor show that the calibrated baseline model captures the dominant growth trend of CBF with embedding size. However, the empirical critical chain-strength exponent ranges from $$\alpha =0.805$$ to $$\alpha =1.006$$ across chain-break tolerance thresholds, with 95% bootstrap confidence intervals consistently excluding the independent-noise prediction $$\alpha =0.5$$ ; a direct fit of a correlated-variance extension recovers $$\gamma \approx 1.8$$ , consistent with the asymptotic relation $$\gamma =2\alpha $$ . These results indicate that real-hardware variance accumulation deviates from the independent-noise reference and is consistent with a correlated component. The proposed framework offers quantitative guidance for embedding-aware chain-strength tuning and motivates more general noise models incorporating correlated and non-Gaussian hardware effects.

DOI
10.1007/s11128-026-05293-z

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Quantum annealing solves combinatorial optimization problems by finding the energetic ground states of an embedded Hamiltonian. However, quantum annealing dynamics under the embedded Hamiltonian may violate the principles of adiabatic evolution and generate excitations that correspond to errors in the computed solution. Here we empirically benchmark the probability of chain breaks and identify sweet spots for solving a suite of embedded Hamiltonians. We further correlate the physical location of chain breaks in the quantum annealing hardware with the underlying embedding technique and use these localized rates in a tailored post-processing strategies. Our results demonstrate how to use characterization of the quantum annealing hardware to tune the embedded Hamiltonian and remove computational errors.
Abstract Quantum annealing solves combinatorial optimization problems by finding the energetic ground states of an embedded Hamiltonian. However, quantum annealing dynamics under the embedded Hamiltonian may violate the principles of adiabatic evolution and generate excitations that correspond to errors in the computed solution. Here we empirically benchmark the probability of chain breaks and identify sweet spots for solving a suite of embedded Hamiltonians. We further correlate the physical location of chain breaks in the quantum annealing hardware with the underlying embedding technique and use these localized rates in a tailored post-processing strategies. Our results demonstrate how to use characterization of the quantum annealing hardware to tune the embedded Hamiltonian and remove computational errors.
Quantum computing offers a promising route for tackling hard optimization problems by encoding them as Ising models. However, sparse qubit connectivity requires the use of minor-embedding, mapping logical qubits onto chains of physical qubits, which necessitates stronger intra-chain coupling to maintain consistency. This elevated coupling strength forces a rescaling of the Hamiltonian due to hardware-imposed limits on the allowable ranges of coupling strengths, reducing the energy gaps between competing states, thus, degrading the solver's performance. Here, we introduce a theoretical model that quantifies this degradation. We show that as the connectivity degree increases, the effective temperature rises as a polynomial function, resulting in a success probability that decays exponentially. Our analysis further establishes worst-case bounds on the energy scale degradation based on the inverse conductance of chain subgraphs, revealing two most important drivers of chain strength, \textit{chain volume} and \textit{chain connectivity}. Our findings indicate that achieving quantum advantage is inherently challenging. Experiments on D-Wave quantum annealers validate these findings, highlighting the need for hardware with improved connectivity and optimized scale-aware embedding algorithms.
Analog quantum processors based on Rydberg atom arrays are a powerful platform for many-body quantum simulation, combinatorial optimization, and graph machine learning. As these devices become increasingly accessible, establishing confidence in their outputs requires predictive models that quantitatively connect microscopic hardware imperfections to empirical results. Here, we present a noise-aware emulation framework that propagates the dominant noise mechanisms throughout the full computation cycle to predict device behavior. We validate the framework by benchmarking two representative protocols, quantum annealing and post-quench dynamics, on three Pasqal quantum processors where classical simulations still provide ground truth. Across all three devices, the measured observables fall within the uncertainty envelopes predicted by the emulator. Beyond reproducing the data, the framework isolates which physical mechanism dominates in each operating regime, provides quantitative guidance for algorithm design and hardware improvements, and establishes a foundation for verifying analog processors in regimes beyond classical reach.