Directional couplers are fundamental building blocks for integrated quantum photonic circuits but are highly sensitive to fabrication imperfections. We demonstrate that composite segmented directional couplers (CSDCs) enhance gate fidelity without active tuning. We design and fabricate fully integrated photonic controlled-NOT (CNOT) gates using both uniform and composite coupler variants and compare their performance via simulation, classical characterization, and quantum two-photon interference. The composite design reduces the average computational-basis error probability by nearly a factor of two and variability by a factor of five, with residual error primarily limited by photon indistinguishability. These results establish CSDCs as passive, foundry-compatible building blocks for scalable quantum photonic circuits.
Directional couplers are fundamental building blocks for integrated quantum photonic circuits but are highly sensitive to fabrication imperfections. We demonstrate that composite segmented directional couplers (CSDCs) enhance gate fidelity without active tuning. We design and fabricate fully integrated photonic controlled-NOT (CNOT) gates using both uniform and composite coupler variants and compare their performance via simulation, classical characterization, and quantum two-photon interference. The composite design reduces the average computational-basis error probability by nearly a factor of two and variability by a factor of five, with residual error primarily limited by photon indistinguishability. These results establish CSDCs as passive, foundry-compatible building blocks for scalable quantum photonic circuits.
ABSTRACT Scalable quantum information processing with integrated photonics requires quantum logic operations with low error probability and robustness. Directional couplers, the fundamental elements enabling quantum interference and logic operations, are inherently sensitive to fabrication imperfections and environmental fluctuations, leading to increased gate error probabilities. Here, we experimentally demonstrate a passive design strategy that mitigates these errors by exploiting a stationary geometrical configuration in uniform directional couplers, where first‐order variations in the coupling coefficient are intrinsically suppressed. The robust geometry is implemented in a silicon‐on‐insulator photonic chip hosting two‐photon controlled‐NOT (CNOT) quantum gates and its performance is directly compared to a non‐optimized design fabricated under the same process and measurement conditions. Measurements indicate a mean error probability of , lower than the non‐robust implementation value of , without active tuning or footprint increase. The remaining error is dominated by finite photon indistinguishability, with a corrected HOM‐limited error floor of . Monte Carlo simulations incorporating measured fabrication noise are consistent with the observed reduction and with suppression of gate‐level error rates. These results support the use of stationary‐geometry couplers as compact, fabrication‐tolerant building blocks for scalable photonic quantum circuits.
The design, fabrication, and detailed calibration of essential building blocks towards fully integrated linear-optics quantum computation are discussed. Photonic devices are made from silicon nitride rib waveguides, where measurements on ring resonators show small propagation losses. Directional couplers are designed to be insensitive to fabrication variations. Their offset and coupling lengths are measured, as well as the phase difference between the transmitted and reflected light. With careful calibrations, the insertion loss of the directional couplers is found to be small. Finally, an integrated controlled-NOT circuit is characterized by measuring the transmission through different combinations of inputs and outputs. The gate fidelity for the CNOT operation with this circuit is estimated to be 99.81% after post selection. This high fidelity is due to our robust design, good fabrication reproducibility, and extensive characterizations.
Integrated quantum photonic circuits are a key enabling technology for the scalability of quantum information systems. Among the available platforms, silicon photonics offers an unrivalled capability for the large-scale integration of photonic components within compact footprints. However, the strong index contrast that enables ultra-compact silicon devices also makes them highly sensitive to fabrication imperfections. As circuit complexity increases, active tuning is generally required to maintain spectral alignment among the different components, leading to significant power consumption that ultimately limit scalability. Here, we demonstrate a fully integrated silicon quantum photon-pair source operating without active tuning of any component. The circuit combines photon-pair generation in a micro-ring resonator, pump rejection using Bragg filters, and signal/idler demultiplexing through modal add-drop filters with building blocks engineered to minimize sensitivity to fabrication variations. The resulting circuit achieves excellent experimental quantum performance. Coincidence rates up to 4000 counts s^-1 with coincidence-to-accidental ratios as high as 100 are obtained across the generated spectrum, while separate two-photon interference measurements yield raw visibilities exceeding 93% for individually selected ITU wavelength-channel pairs. By eliminating the need for active spectral tuning while maintaining high quantum performance, this work addresses a major bottleneck in the scaling of complex silicon quantum photonic circuits.
Femtosecond lasers enable three-dimensional direct writing of waveguides inside bulk transparent materials and have been applied to the fabrication of integrated photonic quantum logic gates. Up to now, the controlled-NOT (CNOT) gate, the key two-qubit quantum gate, has been realized only for polarization-encoded photonic qubits, which consists of three partially polarizing directional couplers (DCs) or two polarizing DCs. In this work, we demonstrate the femtosecond laser direct writing of a path-encoded CNOT gate formed by five DCs all with precisely controlled splitting ratios and stable symmetric phases inside glass for the first time. The quantum CNOT operation is performed using single photons with an average fidelity higher than 0.98. This provides a novel venue for the fabrication of large-scale 3D quantum computation circuits based on femtosecond laser writing.
Large-scale quantum computers possess the capacity to effectively tackle practical problems that can be insurmountable for classical computers. The main challenge in building these quantum computers is to realize scalable modules for remote qubits and entanglement. By assembling small, specialized parts into a larger architecture, the modular approach mitigates complexity and uncertainty. Such a distributed architecture requires non-local quantum gate operations between remote qubits. An essential method for implementing such operations, known as quantum gate teleportation, requires only local operations, classical communication, and shared entanglement. Till today, the quantum gate teleportation using a photonic chip has remained elusive. Here, we experimentally demonstrate the quantum teleportation of an on-chip controlled-NOT (CNOT) gate, implemented via a silicon polarization directional coupler. Assisted with the scalable silicon chip platform, high-fidelity local quantum logic gates, linear optical components, post-selected entanglement, and coincidence measurements from photonic qubits, we first measure and characterize our teleported chip-scale CNOT gate with an average truth table fidelity of 93.1 ± 0.3%. Second, for different input polarization states, we obtain an average quantum state fidelity of 87.0 ± 2.2% with our teleported on-chip CNOT gate. Third, we use our non-local CNOT gate for remote entanglement creation of four Bell states, with an average quantum state fidelity of 86.2 ± 0.8%. Fourth, we fully characterize our teleported on-chip CNOT gate with a quantum process fidelity of 83.1 ± 2.0%, and an average non-local CNOT gate fidelity of 86.5 ± 2.2%. Our teleported photonic on-chip quantum logic gate could be extended both to multiple qubits and chip-scale modules towards fault-tolerant and large-scale distributed quantum computation.
Quantum photonic devices are typically based on either discrete variable (DV) or continuous variable (CV) principles. In either case, their performance must meet strict “fidelity” requirements, especially when scaled using integrated photonic circuitry. DV devices must be robust to imperfections such as timing delays between photons, unwanted spectral correlations present in photons from nonideal single photon sources and variations in circuit components. Furthermore, it becomes increasingly important to have a methodology for characterizing the performance of devices in the presence of such errors. Here, we present a method for simulating quantum photonic integrated circuits (PICs) and use it to model the behavior of a circuit constructed to model the evolution of a quantum state subject to a Bose-Hubbard Hamiltonian, introducing variations to the coupling gaps in the directional couplers inside the circuit. Input states consisting of both indistinguishable and distinguishable photons are modelled. Compact models for the directional couplers and other photonic circuit elements that are parameterized for a specific fabrication process can be incorporated into the circuit using a foundry-associated compact model library, ensuring consistency between circuit design and manufactured component. In CV applications, the degree of squeezing provided by some nonlinear element is often a key metric. Here we describe how the degree of squeezing produced by spontaneous four-wave mixing (SFWM) in a microring resonator can be modelled in the low-power limit, accounting for the effects of self-phase modulation (SPM), cross-phase modulation (XPM), and component losses.