Simulating quantum circuits (QC) on high-performance computing (HPC) systems has become an essential method to benchmark algorithms and probe the potential of large-scale quantum computation despite the limitations of current quantum hardware. However, these simulations often require large amounts of resources, necessitating the use of large clusters with thousands of compute nodes and large memory footprints. In this work, we introduce an end-to-end framework that provides an efficient partitioning scheme for large-scale QCs alongside a flexible code generator to offer a portable solution that minimizes data movement between compute nodes. By formulating the distribution of quantum states and circuits as a graph problem, we apply closeness centrality to assess gate importance and design a fast, scalable partitioning method. The resulting partitions are compiled into highly optimized codes that run seamlessly on a wide range of supercomputers, providing critical insights into the performance and scalability of quantum algorithm simulations.
Simulating quantum circuits (QC) on high-performance computing (HPC) systems has become an essential method to benchmark algorithms and probe the potential of large-scale quantum computation despite the limitations of current quantum hardware. However, these simulations often require large amounts of resources, necessitating the use of large clusters with thousands of compute nodes and large memory footprints. In this work, we introduce an end-to-end framework that provides an efficient partitioning scheme for large-scale QCs alongside a flexible code generator to offer a portable solution that minimizes data movement between compute nodes. By formulating the distribution of quantum states and circuits as a graph problem, we apply closeness centrality to assess gate importance and design a fast, scalable partitioning method. The resulting partitions are compiled into highly optimized codes that run seamlessly on a wide range of supercomputers, providing critical insights into the performance and scalability of quantum algorithm simulations.
Simulating quantum circuits (QC) on high-performance computing (HPC) systems is essential for validating quantum algorithms and probing the potential of large-scale quantum computation before the advent of scalable quantum hardware. However, state vector simulations are resource-intensive, often requiring large clusters with thousands of compute nodes and large amounts of memory. To address this, we introduce C-3PQ, an end-to-end framework that minimizes inter-node data movement through an efficient circuit partitioning scheme alongside a flexible code generator to offer a portable simulation solution. By formulating the distribution of the state vector and circuit over multiple nodes as a graph problem, we utilize closeness centrality to assess gate importance and design a fast, scalable partitioning method. C-3PQ compiles the resulting partitions into highly optimized kernels targeting a wide range of hardware platforms from Intel, AMD, NVIDIA and ARM. Moreover, compared to a state-of-the-art implementation specific for NVIDIA platforms, C-3PQ achieves a speedup of up to 40% at a fraction of the cost when partitioning the state vector.
Large-scale quantum circuit simulation on high-performance computing (HPC) systems is crucial for developing and verifying quantum algorithms to overcome the limitations of current noisy quantum computers. However, existing simulators face scalability bottlenecks due to memory limits and communication overhead. Many state-of-the-art approaches rely on static circuit partitioning, which makes it difficult to address the exponential growth in problem size as the number of qubits increases. To overcome these challenges, we present ScaleQsim, a highly scalable quantum circuit simulation framework for large-scale HPC systems. ScaleQsim focuses on providing a unified representation of the full qubit state, yet provides scalability through efficient synchronization and communication. ScaleQsim adopts a novel full state vector partitioning strategy that evenly distributes the full state vector across multiple nodes and GPUs. This distributed structure enables efficient parallel gate execution without costly synchronization, and ScaleQsim applies adaptive kernel configuration, which adjusts execution parameters based on GPU resources and task granularity to enhance simulation efficiency. Our evaluation on the Perlmutter supercomputer with up to 512 GPUs demonstrates that ScaleQsim simulates quantum circuits with up to 42 qubits and outperforms state-of-the-art simulators by up to 77.40× across various quantum circuits.
Graph partitioning is a fundamental problem in computer science, with applications ranging from high-performance computing to image processing and data analytics. Traditional graph partitioning algorithms often struggle with scalability, particularly when dealing with large, complex graphs. This paper proposes a novel quantum-inspired graph partitioning algorithm designed to address these limitations. The core idea is to mimic the principles of quantum superposition and entanglement to explore the entire solution space simultaneously. The algorithm utilizes probabilistic methods to navigate this space and converge towards a near-optimal partitioning, offering potential improvements in efficiency and scalability compared to conventional methods. The methodology introduces a scoring function based on graph cut metrics and probabilistic routing to simulate quantum interference, ultimately leading to a more effective partitioning. The performance of the algorithm is evaluated through simulations, demonstrating its potential to significantly reduce the computational cost of graph partitioning for large-scale systems. Further research will focus on optimizing the probabilistic routing and exploring different quantum-inspired techniques.
Quantum circuit simulation is crucial for the development of quantum algorithms, particularly given the high cost and noise limitations of physical quantum hardware. While full-state quantum circuit simulation is commonly employed for prototyping and debugging, it poses challenges because of the exponential increase in simulation time for large quantum systems. In this work, we propose an extensible framework designed to enhance simulation performance by optimizing both data locality and computational efficiency, thereby addressing these challenges. This framework is seamlessly integrated with an optimizer that restructures quantum circuits and a simulator that adjusts execution strategies for various quantum operations. For the newly developed components, merge booster and diagonal detector, the underlying algorithms are inspired by the principles of quantum entanglement and gate fusion, as well as by the limitations identified in existing third-party simulation libraries. The experiments were conducted on eight DGX-H100 workstations, each equipped with eight NVIDIA H100 GPUs, employing both gate-level and circuit-level benchmarks. The results indicate a speedup of up to 160 times for circuit-level benchmarks and an acceleration of up to 34 times for diagonal-heavy gate-level benchmarks compared to existing simulators. The proposed methodologies are anticipated to deliver more robust and faster quantum circuit simulations, thereby fostering the advancement of novel quantum algorithms.
Quantum computers face inherent scaling challenges, a fact that necessitates investigation of distributed quantum computing systems, whereby scaling is achieved through interconnection of smaller quantum processing units. However, connecting large numbers of QPUs will eventually result in connectivity constraints at the network level, where the difficulty of entanglement sharing increases with network path lengths. This increases the complexity of the quantum circuit partitioning problem, since the cost of generating entanglement between end nodes varies with network topologies and existing links. We address this challenge using a simple modification to existing partitioning schemes designed for all-to-all connected networks, that efficiently accounts for both of these factors. We investigate the performance in terms of entanglement requirements and optimisation time of various quantum circuits over different network topologies, achieving lower entanglement costs in the majority of cases than state-of-the-art methods. We provide techniques for scaling to large-scale quantum networks employing both network and problem coarsening. We show that coarsened methods can achieve improved solution quality in most cases with significantly lower run-times than direct partitioning methods.
Optimizing and simulating quantum circuits at scale are critical bottlenecks in realizing the full potential of quantum computing. This thesis delivers a comprehensive suite of systems to overcome these limitations, spanning both physical compilation and classical simulation. For quantum circuit optimization, we first automate the discovery and verification of transformation rules by introducing Equivalence Circuit Class (ECC) sets and an efficient generation algorithm for arbitrary gate sets. We deploy these rules within the superoptimizer Quartz, which utilizes a cost-based backtracking search to escape local minima that trap traditional rule-based methods. To eliminate the exponential runtime penalties inherent to pure search, we introduce QALM, a hybrid optimization framework. By unifying search-based exploration with greedy rule-based exploitation in an interleaved control loop, QALM dynamically escapes local minima without exhaustive backtracking. Evaluated across a large benchmark suite of 248 diverse circuits, QALM outperforms existing search-based optimizers in final circuit quality while operating with the computational efficiency of rule-based systems. While the prior two approaches aim for global optimization, this problem is intrinsically QMA-hard, creating a bottleneck for large programs. To circumvent this issue and scale up, we introduce OAC, a cut-and-meld circuit optimization algorithm. OAC cuts a circuit into subcircuits, applies an existing oracle optimizer independently, and seamlessly melds the results. This algorithm operates with a linear number of oracle calls while attaining local optimality. Empirical evaluation shows that OAC significantly improves the efficiency of state-of-the-art optimizers while enhancing overall quality. Beyond physical execution, the scalable simulation of quantum circuits on classical hardware presents another major challenge. To address this, we present Atlas, a distributed GPU-based simulator that hierarchically partitions circuits to exploit data parallelism while minimizing communication overhead. By leveraging integer linear programming to allocate structurally related gates to nearby GPUs and dynamic programming for kernel scheduling, Atlas runs significantly faster than prior state-of-the-art GPU simulators. Together, these frameworks provide a robust toolchain, improving both the execution of quantum circuits on physical devices and their scalable classical simulation.