Analog quantum simulation leverages native hardware dynamics to emulate complex quantum systems with great efficiency by bypassing the quantum circuit abstraction. However, conventional compilation methods for analog simulators are typically labor-intensive, prone to errors, and computationally demanding. This paper introduces QTurbo, a powerful analog quantum simulation compiler designed to significantly enhance compilation efficiency and optimize hardware execution time. By generating precise and noiseresilient pulse schedules, our approach ensures greater accuracy and reliability, outperforming the existing state-of-theart approach.
Analog quantum simulation leverages native hardware dynamics to emulate complex quantum systems with great efficiency by bypassing the quantum circuit abstraction. However, conventional compilation methods for analog simulators are typically labor-intensive, prone to errors, and computationally demanding. This paper introduces QTurbo, a powerful analog quantum simulation compiler designed to significantly enhance compilation efficiency and optimize hardware execution time. By generating precise and noiseresilient pulse schedules, our approach ensures greater accuracy and reliability, outperforming the existing state-of-theart approach.
Analog quantum simulation leverages native hardware dynamics to emulate complex quantum systems with great efficiency by bypassing the quantum circuit abstraction. However, conventional compilation methods for analog simulators are typically labor-intensive, prone to errors, and computationally demanding. This paper introduces QTurbo, a powerful analog quantum simulation compiler designed to significantly enhance compilation efficiency and optimize hardware execution time. By generating precise and noise-resilient pulse schedules, our approach ensures greater accuracy and reliability, outperforming the existing state-of-the-art approach.
Quantum Hamiltonian simulation, which simulates the evolution of quantum systems and probes quantum phenomena, is one of the most promising applications of quantum computing. Recent experimental results suggest that Hamiltonian-oriented analog quantum simulation would be advantageous over circuit-oriented digital quantum simulation in the Noisy Intermediate-Scale Quantum (NISQ) machine era. However, programming analog quantum simulators is much more challenging due to the lack of a unified interface between hardware and software. In this paper, we design and implement SimuQ, the first framework for quantum Hamiltonian simulation that supports Hamiltonian programming and pulse-level compilation to heterogeneous analog quantum simulators. Specifically, in SimuQ, front-end users specify the target quantum system with Hamiltonian Modeling Language, and the Hamiltonian-level programmability of analog quantum simulators is specified through a new abstraction called the abstract analog instruction set (AAIS) and programmed in AAIS Specification Language by hardware providers. Through a solver-based compilation, SimuQ generates executable pulse schedules for real devices to simulate the evolution of desired quantum systems, which is demonstrated on superconducting (IBM), neutral-atom (QuEra), and trapped-ion (IonQ) quantum devices. Moreover, we demonstrate the advantages of exposing the Hamiltonian-level programmability of devices with native operations or interaction-based gates and establish a small benchmark of quantum simulation to evaluate SimuQ’s compiler with the above analog quantum simulators.
Quantum computers are regarded as the future of computing, as they are believed to be capable of solving extremely complex problems that are intractable on conventional digital computers. However, near-term quantum computers are prone to a plethora of noise sources that are difficult to mitigate, possibly limiting their scalability and precluding us from running any useful algorithms. Quantum emulation is an alternative approach that uses classical analog hardware to emulate the properties of superposition and entanglement, thereby mimicking quantum parallelism to attain similar speeds. By contrast, the use of classical digital hardware, such as field programmable gate arrays (FPGA), is less inefficient at emulating a quantum computer, as it does not take advantage of the fundamentally analog nature of quantum states. Consequently, this approach adds an inherent hardware overhead that also prevents scaling. In this work, an energy-efficient quantum emulator based on analog circuits realized in UMC 180-nm CMOS technology is proposed along with the design methodologies for a scalable computing architecture. A six-fold improvement in power consumption was observed over the FPGA-based approach for a ten-qubit emulation of Grover's search algorithm. The proposed emulator is also about 400 times faster than a Ryzen 5600x six-core processor performing a simulation of six-qubit Grover's search algorithm
Quantum computing, leveraging the principles of superposition and entanglement, holds the potential to revolutionize computational problem-solving across a wide array of fields, from cryptography to complex system simulations. However, unlocking the full power of quantum computing requires the development of advanced quantum compilation techniques that can efficiently map high-level algorithms onto physical quantum hardware. This paper delves into state-of-the-art optimization strategies within quantum compilers, with a particular focus on methods such as Relaxed Peephole Optimization (RPO), gate reordering techniques for the Quantum Approximate Optimization Algorithm (QAOA), and reinforcement learning (RL)-driven frameworks. It also explores innovative approaches like distributed quantum compilation, parity quantum optimization, and the Paulihedral framework, all designed to minimize gate counts, reduce circuit depth, and optimize overall resource utilization. A key contribution of this work is the introduction of error mitigation techniques that enhance the fidelity and scalability of quantum circuits, particularly on noisy intermediate-scale quantum (NISQ) devices. Through comprehensive empirical evaluations across a variety of quantum algorithms, the paper demonstrates significant improvements in critical performance metrics such as circuit depth, gate count, and execution efficiency, providing a promising direction for optimizing quantum circuit design tailored to diverse quantum hardware platforms.
Quantum computers hold the promise of solving certain computational problems significantly faster than classical computers. Unlocking the full potential of quantum hardware depends on our ability to efficiently translate high-level quantum algorithms into executable sequences of quantum operations tailored to the specific constraints of a given device, a task known as quantum compilation. Among the most promising applications is the simulation of quantum systems, such as in quantum chemistry, where scalable, error resilient, and experimentally feasible Hamiltonian simulation techniques are essential. In the first part of this thesis, we present recent advances in the field of quantum compilation, emphasizing on efficient gate decomposition and circuit optimization. In particular, we analyze compilation techniques for Clifford circuits and general single-qubit rotations. Clifford operations play a central role in quantum error correction, the characterization of quantum devices and quantum cryptography. We explore asymptotically optimal decomposition methods, including constructions using either two-qubit gates or global entangling operations, the latter being especially well-suited for platforms like trapped ions. For single-qubit unitaries, we discuss approximation schemes that achieve the theoretically optimal scaling of gate count with respect to the desired precision. Beyond gate synthesis, we examine various hardware-aware optimization strategies aimed at reducing circuit depth and gate overhead. These include techniques for qubit routing in systems with limited connectivity, as well as methods for removing redundant operations. The second and primary, scientific contribution of this thesis focuses on implementation of effective many-body interactions on quantum hardware by combining the system’s native dynamics with control operations, which we call Hamiltonian engineering. Motivated by the central role of Hamiltonian simulation in quantum science, we introduce a general and efficient framework for synthesizing arbitrary target Hamiltonians under mild locality constraints. We propose a novel linear programming (LP) approach that computes pulse sequences consisting of single-qubit π or π/2 rotations applied at certain times during free evolution under the system’s native Hamiltonian. Our LP-based framework offers multiple advantages. First, its classical runtime depends only on the number and locality of the interactions in the system Hamiltonian, not directly on the overall system size. Second, we extend the method to include robustness against common error sources such as finite pulse time effects and systematic control errors, leveraging tools from average Hamiltonian theory and robust composite pulses. Our approach enables the efficient realization of high-fidelity Hamiltonian dynamics with minimal experimental overhead. The scalability of the approach are demonstrated through simulations, including the engineering of a random two-body Hamiltonian on a 225 qubit lattice in under a minute of classical preprocessing. In conclusion, this thesis contributes both theoretical insights and practical tools that bridge the gap between algorithm design and experimental implementation in quantum computing. The techniques developed here are directly applicable to a variety of platforms, including trapped ions, neutral atoms, and superconducting circuits. By advancing the frontiers of Hamiltonian engineering, this work enables more efficient, robust, and scalable quantum simulations on nearterm devices. Finally, it brings us closer to realizing quantum technologies, which are possibly capable of solving meaningful problems.
The rapid evolution of Noisy Intermediate-Scale Quantum (NISQ) devices has intensified the need for robust compilation strategies capable of mitigating hardware-induced errors while maximizing computational efficiency. Quantum compilers play a pivotal role in translating high-level quantum algorithms into hardware-executable instructions, yet they face significant challenges related to qubit connectivity constraints, limited coherence times, and stochastic noise. This paper examines error-resilient quantum compiler design for efficient qubit mapping, gate optimization, and noise mitigation in NISQ-era devices, proposing a framework that integrates topology-aware mapping, adaptive gate synthesis, and probabilistic error suppression techniques. By synthesizing advances in quantum circuit optimization, hardware-aware scheduling, and hybrid classical–quantum error correction strategies, the study evaluates how compiler-level innovations can substantially enhance execution fidelity and resource efficiency. The findings suggest that intelligent compiler architectures are critical enablers of practical quantum advantage during the transitional NISQ phase, bridging theoretical algorithm design with real-world hardware constraints.