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arXiv:2505.08928 · IEEE International Conference on Quantum Computing and Engineering (QCE)

TeleSABRE: Heuristic Layout Synthesis in Multi-Core Quantum Systems with Teleport Interconnect

Enrico Russo, Elio Vinciguerra, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania

Published Aug 30, 2025• 7 citations
arXivHTMLPDF

Abstract

Quantum circuit compilation and, in particular, efficient qubit layout synthesis is a critical challenge in modular, multi-core quantum architectures with constrained interconnects. In this work, we extend the SABRE heuristic algorithm to develop TeleSABRE, a layout synthesis approach tailored for architectures featuring teleportation-based interconnects. Unlike standard SABRE, which only introduces SWAP operations for qubit movement, TeleSABRE integrates both intra-core SWAPs and teleportation-based techniques leveraging qubit teleportation and gate teleportation across cores. This enables more efficient circuit execution by reducing both inter-core communication overhead and the number of intra-core SWAPs required to allow teleportation protocols and local gate executions. Experimental results demonstrate that TeleSABRE achieves 28% reduction across various benchmarks in terms of inter-core operations while also taking into account the logistics of the teleport protocols.

DOI
10.1109/qce65121.2025.00086

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Waibel, Jakob

Quantum computing promises to solve certain problems more efficiently than classical computation. Realizing this potential on noisy, intermediate-scale quantum (NISQ) devices remains challenging. Among other things, hardware connectivity constraints necessitate additional routing operations that degrade circuit fidelity. The qubit mapping problem - assigning logical qubits to physical qubits while minimizing inserted SWAP gates - is thus critical in quantum circuit transpilation. Exact methods scale poorly, and heuristic approaches like the SABRE algorithm, though efficient, rely on local decisions that can miss globally optimal solutions. In this thesis, we propose K-SWAP SABRE that integrates bounded exhaustive search over sequences of up to k SWAPs into the SABRE algorithm. A modified heuristic ensures global progress while maintaining comparability between explored branches. Experiments on benchmark circuits show that increasing k reduces required SWAP gates, especially on highly connected devices, though at the cost of longer runtime. Our results demonstrate that K-SWAP SABRE can improve heuristic qubit mapping quality without sacrificing scalability, offering a practical approach for mapping circuits to near-term and emerging quantum architectures.

•Jan 1, 2025•0 citations
Quantum circuit compilation and, in particular, efficient qubit layout synthesis is a critical challenge in modular, multi-core quantum architectures with constrained interconnects. In this work, we extend the SABRE heuristic algorithm to develop TeleSABRE, a layout synthesis approach tailored for architectures featuring teleportation-based interconnects. Unlike standard SABRE, which only introduces SWAP operations for qubit movement, TeleSABRE integrates both intra-core SWAPs and teleportation-based techniques leveraging qubit teleportation and gate teleportation across cores. This enables more efficient circuit execution by reducing both inter-core communication overhead and the number of intra-core SWAPs required to allow teleportation protocols and local gate executions. Experimental results demonstrate that TeleSABRE achieves 28% reduction across various benchmarks in terms of inter-core operations while also taking into account the logistics of the teleport protocols.
Minimising EPR consumption is the dominant objective when routing a quantum circuit on a distributed quantum computer (DQC). We present dSABRE, a SABRE-style router for multi-core processors that, on each iteration of a lookahead-driven loop, first resolves any intra-core front-layer gates by SWAP scoring and only falls back to scoring inter-core teleportation candidates when the intra-core front is empty. Three mechanisms drive the improvement over the state of the art: a five-term gate-centric teleportation score that generalises the local SWAP heuristic to the inter-core setting, whose explicit capacity-penalty term keeps the scorer from teleporting into saturated cores; a proactive congestion-relief pass that redistributes idle qubits out of high-demand cores before deadlock; and a BFS-layer construction of the inter-core extended set that respects DAG dependencies layer by layer rather than mixing wires in topological order. Across 18 MQT-Bench circuits at 25, 36, and 64 logical qubits, dSABRE reduces geometric-mean EPR consumption by 41-44% over TeleSABRE and by 16-68% over the gate-teleportation-based pytket-dqc, using standard Qiskit SabreLayout for the initial layout. A large-circuit QFT sweep at 100-360 qubits confirms scalability. Code and online appendices are available at https://github.com/ebony72/dsabre.
Quantum Layout Synthesis (QLS) is a critical compilation stage that adapts quantum circuits to hardware constraints with an objective of minimizing the SWAP overhead. While heuristic tools demonstrate good efficiency, they often produce suboptimal solutions, and exact methods suffer from limited scalability. In this work, we propose ML-SABRE, a high-performance multilevel framework for QLS that improves both solution quality and compilation time through a hierarchical optimization approach. We employ the state-of-the-art heuristic method, LightSABRE, at all levels to ensure both efficiency and performance. Our evaluation on real benchmarks and hardware architectures shows that ML-SABRE decreases SWAP count by over 60%, circuit depth by 17%, and delivers a 60% compilation time reduction compared to state-of-the-art solvers. Further optimality studies reveal that ML-SABRE can significantly reduce the optimality gap by up to 82% for SWAP count and 49% for circuit depth, making it well-suited for emerging quantum devices with increasing size and architectural complexity.
Multi-core quantum computing architectures offer a promising and scalable solution to the challenges of integrating large number of qubits into existing monolithic chip design. However, the issue of transferring quantum information across the cores remains unresolved. Quantum Teleportation offers a potential approach for efficient qubit transfer, but existing methods primarily rely on centralized interconnection mechanisms for teleportation, which may limit scalability and parallel communication. We proposes a decentralized framework for teleportation in multi-core quantum computing systems, aiming to address these limitations. We introduce two variants of teleportation within the decentralized framework and evaluate their impact on reducing end-to-end communication delay and quantum circuit depth. Our findings demonstrate that the optimized teleportation strategy, termed two-way teleportation, results in a substantial 40% reduction in end-to-end communication latency for synthetic benchmarks and a 30% reduction for real benchmark applications, and 24% decrease in circuit depth compared to the baseline teleportation strategy. These results highlight the significant potential of decentralized teleportation to improve the performance of large-scale quantum systems, offering a scalable and efficient solution for future quantum architectures.
Multi-core quantum computing architectures offer a promising and scalable solution to the challenges of integrating large number of qubits into existing monolithic chip design. However, the issue of transferring quantum information across the cores remains unresolved. Quantum Teleportation offers a potential approach for efficient qubit transfer, but existing methods primarily rely on centralized interconnection mechanisms for teleportation, which may limit scalability and parallel communication. We proposes a decentralized framework for teleportation in multi-core quantum computing systems, aiming to address these limitations. We introduce two variants of teleportation within the decentralized framework and evaluate their impact on reducing end-to-end communication delay and quantum circuit depth. Our findings demonstrate that the optimized teleportation strategy, termed two-way teleportation, results in a substantial 40% reduction in end-to-end communication latency for synthetic benchmarks and a 30% reduction for real benchmark applications, and 24% decrease in circuit depth compared to the baseline teleportation strategy. These results highlight the significant potential of decentralized teleportation to improve the performance of large-scale quantum systems, offering a scalable and efficient solution for future quantum architectures.
Modular quantum computing architectures are a promising alternative to monolithic QPU (Quantum Processing Unit) designs for scaling up quantum devices. They refer to a set of interconnected QPUs or cores consisting of tightly coupled quantum bits that can communicate via quantum-coherent and classical links. In multi-core architectures, it is crucial to minimize the amount of communication between cores when executing an algorithm. Therefore, mapping a quantum circuit onto a modular architecture involves finding an optimal assignment of logical qubits (qubits in the quantum circuit) to different cores with the aim to minimize the number of expensive inter-core operations while adhering to given hardware constraints. In this paper, we propose for the first time a Quadratic Unconstrained Binary Optimization (QUBO) technique to encode the problem and the solution for both qubit allocation and inter-core communication costs in binary decision variables. To this end, the quantum circuit is split into slices, and qubit assignment is formulated as a graph partitioning problem for each circuit slice. The costly inter-core communication is reduced by penalizing inter-core qubit communications. The final solution is obtained by minimizing the overall cost across all circuit slices. To evaluate the effectiveness of our approach, we conduct a detailed analysis using a representative set of benchmarks having a high number of qubits on two different multi-core architectures. Our method showed promising results and performed exceptionally well with very dense and highly-parallelized circuits that require on average 0.78 inter-core communications per two-qubit gate.
Quantum computing promises to solve certain problems more efficiently than classical computation. Realizing this potential on noisy, intermediate-scale quantum (NISQ) devices remains challenging. Among other things, hardware connectivity constraints necessitate additional routing operations that degrade circuit fidelity. The qubit mapping problem - assigning logical qubits to physical qubits while minimizing inserted SWAP gates - is thus critical in quantum circuit transpilation. Exact methods scale poorly, and heuristic approaches like the SABRE algorithm, though efficient, rely on local decisions that can miss globally optimal solutions. In this thesis, we propose K-SWAP SABRE that integrates bounded exhaustive search over sequences of up to k SWAPs into the SABRE algorithm. A modified heuristic ensures global progress while maintaining comparability between explored branches. Experiments on benchmark circuits show that increasing k reduces required SWAP gates, especially on highly connected devices, though at the cost of longer runtime. Our results demonstrate that K-SWAP SABRE can improve heuristic qubit mapping quality without sacrificing scalability, offering a practical approach for mapping circuits to near-term and emerging quantum architectures.