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arXiv:2504.12710

Quantum circuit synthesis with qudit phase gadget method

Shuai Yang, Lihao Xu, Guojing Tian, Xiaoming Sun

Published Apr 17, 2025• 0 citations
arXivHTMLPDF

Abstract

Current quantum devices have unutilized high-level quantum resources. More and more attention has been paid to the qudit quantum systems with larger than two dimensions to maximize the potential computing power of quantum computation. Then, a natural problem arises: How do we implement quantum algorithms on qudit quantum systems? In this work, we propose a novel qudit phase gadget method for synthesizing the qudit diagonal unitary matrices. This method is suitable for the Noisy Intermediate-Scale Quantum (NISQ) and fault-tolerant eras due to its versatility in different connectivity architectures and the optimality of its resource consumption. The method can work on any connectivity architecture with asymptotic optimal circuit depth and size. For a 10-qutrit diagonal unitary, our algorithm reduces the circuit depth form about 100000 to 500 with 300 ancillary qutrits. Further, this method can be promoted to different quantum circuit synthesis problems, such as quantum state preparation problems, general unitary synthesis problems, etc.

DOI
10.48550/arxiv.2504.12710

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In the near future of the noisy intermediate-scale quantum (NISQ) era, almost all quantum computing devices will be restricted to a specific fixed qubits connectivity architecture. Thus, the synthesis of quantum circuits with limited connectivity is urgent. We design quantum circuit synthesis algorithms for basic and essential synthesis problems, such as quantum state preparation, general unitary synthesis, and quantum isometries. For any architecture, the controlled not (cnot) count is at most 5/3 times the state-of-the-art result on complete-graph architecture. For some specific architectures, such as square-grid ones, the ratio is reduced to 1.126. The numerical simulation result is confirmatory of theoretical conclusions. Our algorithms significantly reduce by more than 5050%50 additional cnot count compared to mapping algorithms. These algorithms help to implement the larger-scale algorithm in the physics device. Our results illustrate that well-designed synthesis algorithms can mitigate the problem of limited qubit connectivity in the NISQ era and may suggest the design of large-scale quantum devices.
The quantum circuit synthesis problem bridges quantum algorithm design and quantum hardware implementation in the Noisy Intermediate-Scale Quantum (NISQ) era. In quantum circuit synthesis problems, diagonal unitary synthesis plays a crucial role due to its fundamental and versatile nature. Meanwhile, experimental results have shown that moderately approximating the original algorithm to conserve quantum resources can improve the fidelity of algorithms during quantum execution. Building on this insight, we propose a quantum circuit synthesis algorithm to design diagonal unitary implementations based on specified quantum resource limits. Our algorithm can synthesize diagonal unitary for quantum circuits with up to 15 qubits on an ordinary laptop. In algorithm efficiency, synthesizing an n-qubit unitary matrix with an exact algorithm requires 2n2^n2n CNOT gates as a baseline. Within the algorithm error $\varepsilon $ range of interest (0\%-12\%), our algorithm achieves a $3.2\varepsilon $ reduction in CNOT gates on average. In runtime, the algorithm efficiently performs, synthesizing 12-qubit diagonal unitary in an average of 6.57 seconds and 15-qubit in approximately 561.71 seconds.
Quantum circuit synthesis and compilation are critical components in the quantum computing stack, both for contemporary quantum systems, where efficient use of limited resources is essential, as well as for large-scale fault-tolerant platforms, where computation time can be minimized. The specific characteristics of the quantum hardware determine which circuit designs and optimizations are feasible. We present a phase-gadget based method for compilation of quantum circuits using programmable multiqubit entangling gates, that are native, among others, to trapped-ions quantum computers. We use phase-gadgets in order to generically reduce circuit depths and efficiently implement them with few, high-fidelity, multiqubit gates. We test our methods on a large set of benchmark circuits and demonstrate generic circuit depth reduction and implementation error reduction.
During the noisy intermediate-scale quantum (NISQ) era, it is important to optimize the quantum circuits in circuit depth and gate count, especially entanglement gates, including the CNOT gate. Among all the unitary operators, diagonal unitary matrices form a special class that plays a crucial role in many quantum algorithms/subroutines. Based on a natural gate set {CNOT, Rz}, quantum circuits for general diagonal unitary matrices were discussed in several previous works, and an optimal synthesis algorithm was proposed in terms of circuit depth. In this paper, we are interested in the implementation of diagonal unitary matrices with reflection symmetry, which has promising applications, including the realization of real-time evolution for first quantized Hamiltonians by quantum circuits. Owing to such a symmetric property, we show that the quantum circuit in the existing work can be further simplified and propose a constructive algorithm that optimizes the entanglement gate count. Compared to the previous synthesis methods for general diagonal unitary matrices, the quantum circuit by our proposed algorithm achieves nearly half the reduction in both the gate count and circuit depth.
Diagonal unitary operators are well known to be key building blocks of many quantum algorithms and quantum computing procedures, and thus resource-efficient quantum circuit implementations are in demand. Here we propose a constructive algorithm that can generate a quantum circuit over the primitive gate set {cnot, RZ{R}_{Z}RZ​} for realizing any given diagonal unitary operator piece by piece. The theoretical analysis reveals that, for the general case, our generated circuit not only ensures the asymptotically optimal gate count, but also nearly halves the circuit depth compared with the previous Welch's method [New J. Phys. 16, 033040 (2014)]. Specifically, this substantial depth optimization originates from the use of a uniform circuit rewriting rule developed here. The performance of our circuit synthesis algorithm is further validated by numerical evaluations on two examples. First, we achieve a nearly 50% depth reduction over Welch's method for synthesizing random diagonal unitary operators with up to 16 qubits. Second, we achieve an average of 22.05% depth reduction for resynthesizing the diagonal part of the specific quantum approximate optimization algorithm (QAOA) circuits with up to 14 qubits.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block optimization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noise simulations, and large-size circuits on analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compilers such as t|ket>. When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits. Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation toolchain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains.