Quantum circuit optimization is essential for improving the performance of quantum algorithms, particularly on Noisy Intermediate-Scale Quantum (NISQ) devices with limited qubit connectivity and high error rates. Pattern matching has proven to be an effective technique for identifying and optimizing subcircuits by replacing them with functionally equivalent, efficient versions, including reducing circuit depth and facilitating platform portability. However, existing approaches face challenges in handling large-scale circuits and numerous transformation rules, often leading to redundant matches and increased compilation time. In this study, we propose a novel framework for quantum circuit optimization based on pattern matching to enhance its efficiency. Observing redundancy in applying existing transformation rules, our method employs a pattern tree structure to organize these rules, reducing redundant operations during the execution of the pattern-matching algorithm and improving matching efficiency. We design and implement a compilation framework to demonstrate the practicality of the pattern tree approach. Experimental results show that pattern-tree-based pattern matching can reduce execution time by an average of 20% on a well-accepted benchmark set. Furthermore, we analyze how to build a pattern tree to maximize the optimization of compilation time. The evaluation results demonstrate that our approach has the potential to optimize compilation time by 90%.
Quantum circuit optimization is essential for improving the performance of quantum algorithms, particularly on Noisy Intermediate-Scale Quantum (NISQ) devices with limited qubit connectivity and high error rates. Pattern matching has proven to be an effective technique for identifying and optimizing subcircuits by replacing them with functionally equivalent, efficient versions, including reducing circuit depth and facilitating platform portability. However, existing approaches face challenges in handling large-scale circuits and numerous transformation rules, often leading to redundant matches and increased compilation time. In this study, we propose a novel framework for quantum circuit optimization based on pattern matching to enhance its efficiency. Observing redundancy in applying existing transformation rules, our method employs a pattern tree structure to organize these rules, reducing redundant operations during the execution of the pattern-matching algorithm and improving matching efficiency. We design and implement a compilation framework to demonstrate the practicality of the pattern tree approach. Experimental results show that pattern-tree-based pattern matching can reduce execution time by an average of 20% on a well-accepted benchmark set. Furthermore, we analyze how to build a pattern tree to maximize the optimization of compilation time. The evaluation results demonstrate that our approach has the potential to optimize compilation time by 90%.
In the NISQ era, quantum computers have insufficient qubits to support quantum error correction, which can only perform shallow quantum algorithms under noisy conditions. Aiming to improve the fidelity of quantum circuits, it is necessary to reduce the circuit depth as much as possible to mitigate the coherent noise. To address the issue, we propose PaF , a Pattern matching-based quantum circuit rewriting algorithm Framework to optimize quantum circuits. The algorithm framework finds all sub-circuits satisfied in the input quantum circuit according to the given external pattern description, then replaces them with better circuit implementations. To extend the capabilities of PaF , a general pattern description format is proposed to make rewriting patterns in existing work become machine-readable. In order to evaluate the effectiveness of PaF , we employ the BIGD benchmarks in QUEKO benchmark suite to test the performance and the result shows that PaF provides a maximal speedup of [Formula: see text] by using few patterns.
In the era of noisy intermediate-scale quantum (NISQ) computing, the limited connectivity between qubits is one of the common physical limitations faced by current quantum computing devices. Quantum circuit mapping methods transform quantum circuits into equivalent circuits that satisfy physical connectivity constraints by remapping logical qubits, making them executable. The optimization problem of quantum circuit mapping has NP-hard computational complexity, and existing heuristic mapping algorithms still have significant potential for optimization in terms of the number of quantum gates generated. To reduce the number of SWAP gates inserted during mapping, the solution space of the mapping problem is represented as a tree structure, and the mapping process is equivalent to traversing this tree structure. To effectively and efficiently complete the search process, a beam search framework (BSF) is proposed for solving quantum circuit mapping. By iteratively selecting, expanding, and making decisions, high-quality target circuits are generated. Experimental results show that this method can significantly reduce the number of inserted SWAP gates on medium to large circuits, achieving an average reduction of 44% compared to baseline methods, and is applicable to circuits of various sizes and complexities.
The realization of quantum algorithms relies on specific quantum compilations according to the underlying quantum processors. However, there are various ways to physically implement qubits in different physical devices and manipulate those qubits. These differences lead to different communication methods and connection topologies, with each vendor implementing its own set of primitive gates. Therefore, quantum circuits have to be rewritten or transformed in order to be transplanted from one platform to another. We propose a pattern matching-based framework for rewriting quantum circuits, called QRewriting. It takes advantage of a new representation of quantum circuits using symbol sequences. Unlike the traditional way of using directed acyclic graphs, the new representation allows us to easily identify the patterns that appear non-consecutively but reducible. Then, we convert the problem of pattern matching into that of finding distinct subsequences and propose a polynomial-time dynamic programming-based pattern matching and replacement algorithm. We develop a rule library for basic optimizations and use it to rewrite the Arithmetic and Toffoli benchmarks from the GIBM gate set to the GSur gate set. Compared with the existing tool PaF, QRewriting obtains an improvement of reducing depths (resp. gate counts) by 29\% (resp. 14\%).
Quantum computations are typically performed as a sequence of basic operations, called quantum gates. Different gate sequences, called quantum circuits, can implement the same overall quantum computation. Since every additional quantum gate takes time and introduces noise into the system, it is important to find the smallest possible quantum circuit that implements a given computation, especially for near-term quantum devices that can execute only a limited number of quantum gates before noise renders the computation useless. An important building block for many quantum circuit optimization techniques is pattern matching: given a large and small quantum circuit, we would like to find all maximal matches of the small circuit, called a pattern , in the large circuit, considering pairwise commutation of quantum gates. In this work, we present the first classical algorithm for pattern matching that provably finds all maximal matches and is efficient enough to be practical for circuit sizes typical for near-term devices. We demonstrate numerically 1 that combining our algorithm with known pattern-matching-based circuit optimization techniques reduces the gate count of a random quantum circuit by ∼ 30% and can further improve practically relevant quantum circuits that were already optimized with state-of-the-art techniques.
In Noisy Intermediate-Scale Quantum (NISQ) era, quantum processing units (QPUs) suffer from, among others, highly limited connectivity between physical qubits. To make a quantum circuit effectively executable, a circuit transformation process is necessary to transform it, with overhead cost the smaller the better, into a functionally equivalent one so that the connectivity constraints imposed by the QPU are satisfied. While several algorithms have been proposed for this goal, the overhead costs are often very high, which degenerates the fidelity of the obtained circuits sharply. One major reason for this lies in that, due to the high branching factor and vast search space, almost all these algorithms only search very shallowly and thus, very often, only (at most) locally optimal solutions can be reached. In this paper, we propose a Monte Carlo Tree Search (MCTS) framework to tackle the circuit transformation problem, which enables the search process to go much deeper. The general framework supports implementations aiming to reduce either the size or depth of the output circuit through introducing SWAP or remote CNOT gates. The algorithms, called MCTS-Size and MCTS-Depth, are polynomial in all relevant parameters. Empirical results on extensive realistic circuits and IBM Q Tokyo show that the MCTS-based algorithms can reduce the size (depth, resp.) overhead by, on average, 66% (84%, resp.) when compared with tket, an industrial level compiler.
Quantum computing, leveraging the principles of superposition and entanglement, holds the potential to revolutionize computational problem-solving across a wide array of fields, from cryptography to complex system simulations. However, unlocking the full power of quantum computing requires the development of advanced quantum compilation techniques that can efficiently map high-level algorithms onto physical quantum hardware. This paper delves into state-of-the-art optimization strategies within quantum compilers, with a particular focus on methods such as Relaxed Peephole Optimization (RPO), gate reordering techniques for the Quantum Approximate Optimization Algorithm (QAOA), and reinforcement learning (RL)-driven frameworks. It also explores innovative approaches like distributed quantum compilation, parity quantum optimization, and the Paulihedral framework, all designed to minimize gate counts, reduce circuit depth, and optimize overall resource utilization. A key contribution of this work is the introduction of error mitigation techniques that enhance the fidelity and scalability of quantum circuits, particularly on noisy intermediate-scale quantum (NISQ) devices. Through comprehensive empirical evaluations across a variety of quantum algorithms, the paper demonstrates significant improvements in critical performance metrics such as circuit depth, gate count, and execution efficiency, providing a promising direction for optimizing quantum circuit design tailored to diverse quantum hardware platforms.