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arXiv:2411.10406

How to Build a Quantum Supercomputer: Scaling from Hundreds to Millions of Qubits

Masoud Mohseni, Artur Scherer, Katherine Grace Johnson, Oded Wertheim, Matthew Otten, Anand, Namit, Navid Anjum Aadit, Alexeev, Yuri, Ben-Shach, Gilad, Kirk Bresniker, Kerem Yunus Camsari, Barbara Chapman, Soumitra Chatterjee, Chowdhury, Shuvro, Gebremedhin A. Dagnew, Tom Dvir, Aniello Esposito, Farah Fahim, Ferguson, Michael, Marco Fiorentino B, Archit Gajjar, Gratsea, Katerina, Gaurav Gyawali, Heiter, Christian, Kavaki, Ali H. Z., Abdullah Khalid, Xiangzhou Kong, Bohdan Kulchytskyy, Kyoseva, Elica, Ruoyu Li, P. Aaron Lott, Igor L. Markov, R. McDermott, Morais, Lucas, Giacomo Pedretti, Rao, Pooja, Rieffel, Eleanor, Allyson Silva, John Sorebo, Panagiotis Spentzouris, Ziv Steiner, Boyan T. Torosov, Venturelli, Davide, Visser, Robert J., Zak Webb, Xin Zhan, Yonatan Cohen, Pooya Ronagh, Alan Ho, Raymond G. Beausoleil, John M. Martinis

Published Nov 15, 2024• 7 citations
arXivHTMLPDF

Abstract

In the span of four decades, quantum computation has evolved from an intellectual curiosity to a potentially realizable technology. Today, small-scale demonstrations have become possible for quantum algorithmic primitives on hundreds of physical qubits. Nevertheless, there are significant outstanding challenges in quantum hardware, fabrication, software architecture, and algorithms on the path towards a full-stack scalable quantum computing technology. Here, we provide a comprehensive review of these scaling challenges. We show how to facilitate scaling by adopting existing semiconductor technology to build much higher-quality qubits, employing systems engineering approaches, and performing distributed heterogeneous quantum-classical computing. We provide a detailed resource and sensitivity analysis for quantum applications on surface-code error-corrected quantum computers given current, target, and desired hardware specifications based on superconducting qubits, accounting for a realistic distribution of errors. We provide comprehensive resource estimates for several utility-scale applications including quantum chemistry calculations, catalyst design, NMR spectroscopy, and Fermi-Hubbard simulation. We show that orders of magnitude enhancement in performance could be obtained by a combination of hardware improvements and tight quantum-HPC integration. Furthermore, we introduce high-performance architectures for quantum-probabilistic computing with custom-designed accelerators to tackle today's industry-scale classical optimization, machine learning, and quantum simulation tasks in a cost-effective manner.

DOI
10.48550/arxiv.2411.10406

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Quantum computing is advancing rapidly, offering the potential to transform computational paradigms and tackle problems that are intractable for classical systems. Realizing practical quantum systems demands the development of an entirely new computing stack—from qubits and quantum processors to components, wiring and control electronics, transpilers, error handling, software, algorithms, and the compute architecture to integrate quantum and classical resources at scale. This plenary will provide an overview of the current state of quantum computing and outline the milestones on the path toward building a large-scale, fault-tolerant quantum computer by 2029. The significant improvements in hardware, software, and system integration, pushing the performance of quantum computing to reach quantum utility and advance toward quantum advantage, will be presented. Breakthroughs in error correction and a modular approach indicated in the IBM Quantum Roadmap outline a clear path to quantum systems using 200 logical qubits and 100 million quantum operations by 2029 and 2,000 logical qubits a few years later. Furthermore, advances in quantum algorithms, combined with the integration of quantum systems and high-performance computing (HPC), will unlock powerful synergies—accelerating the timeline for applications previously considered to be far in the future.
Quantum computing has progressed from early demonstrations across superconducting, trapped ion, photonic, and spin-based platforms to increasingly integrated systems. However, transitioning from the noisy intermediate-scale quantum (NISQ) era to robust, fault tolerant implementations remain a central challenge. This paper presents a systematic review and synthesis of practical quantum computing, encompassing experimental advances, integrated photonics, error correction breakthroughs, software stack evolution, benchmarking practices, algorithmic readiness, and socio-technical dimensions. We critically assess current limitations and highlight emerging directions, including integrated photonic modules with high fidelity interconnects, real time decoders for surface code logical qubits, and hardware aware compiler strategies. Our analysis is grounded in peer-reviewed experimental data and model-based evaluations. Key findings include demonstrated logical error suppression via increased code distance, scalable photonic module prototypes, and refined resource estimates for cryptanalytic and simulation tasks. This paper concludes with a structured research agenda for 2025–2030, proposing four priority thrusts such as hardware QEC co design, reproducible cross platform benchmarking, modular/distributed architectures, and quantum networking with governance frameworks. This evidence based roadmap aims to align researchers and practitioners toward actionable milestones on the path to practical quantum computing.
Quantum computation exploits superposition, entanglement, interference, and measurement to process information.Research has moved from theoretical algorithms to functional devices where the performance is not only limited by qubit physics, but also by the control, compilation, error mitigation, and error correction.This review considers quantum computing on various levels of abstraction, including physical qubits, quantum algorithms, system architecture, fault-tolerance, and emerging applications.Study-specific evidence regarding scale, operational quality, connectivity, control and suppression of errors is compared across the different types of superconducting circuits, trapped ions, semiconductor spin qubits, neutral atoms and photonic processors.The review of the fundamental algorithms, noisy intermediate-scale quantum computing, variational and hybrid quantum-classical approaches, quantum simulation, quantum machine learning, and security implications is also discussed.Measurable progress has been demonstrated in published experiments for logical-qubit operation, below-threshold surface-code memory, programmable photonic sampling and platformspecific scaling.However, the reported metrics are not directly interchangeable, and practical advantage remains task-and baseline-dependent.Further progress will need to be accompanied by coordinated developments in hardware reliability, error correction, classical control, estimates of algorithmic resources, and clear classical method comparisons.
Design, simulation, analysis and verification methodologies are crucial for developing electronic circuits and systems at large. Whereas long-standing EDA software is used in the semiconductor technology, there is no counterpart for quantum computing systems yet. Although the quantum computing community started utilizing and adapting some of the already existing EDA tools, for instance, to design quantum processors and control electronics for driving the qubits, or even to solve some quantum computing design tasks, they do not fully use the expertise gained over the last decades in the field of design automation. Current intermediate-scale quantum computers have been designed in an ‘adhoc’ manner with heterogeneous methods and tools. As we are entering the large-scale era, it is timely and key to further adopt EDA methodologies and software for quantum computing. In this paper, we provide an overview on how full-stack quantum computing systems are being implemented nowadays and discuss which the main challenges are for transitioning from this current scenario to a comprehensive framework encompassing full automated system-wide architecting, design, simulation, verification, and test.
The development of fault-tolerant quantum computers (FTQCs) is receiving increasing attention within the quantum computing community. Like conventional digital computers, FTQCs, which utilize error correction and millions of physical qubits, have the potential to address some of humanity’s grand challenges. However, accurate estimates of the tangible scale of future FTQCs, based on transparent assumptions, are uncommon. How many physical qubits are necessary to solve a practical problem intractable for classical hardware? What costs arise from distributing quantum computation across multiple machines? This paper presents an architectural model of a potential FTQC based on superconducting qubits, divided into discrete modules and interconnected via coherent links. We employ a resource-estimation framework and software tool to assess the physical resources required to execute specific quantum algorithms compiled into their graph-state form and arranged onto a modular superconducting hardware architecture. Our tool can predict the size, power consumption, and execution time of these algorithms based on explicit assumptions about the physical layout, thermal load, and modular connectivity of the system. We assess the resources needed for quantum computation examples that serve as building blocks of proposed applications, quantifying the architectural bottlenecks and trade-offs that remain to be addressed to deliver utility.