Semiconductor Circuits for Quantum Computing with Electronic Wave Packets
David Pomaranski, Ito, Ryo, Ngoc Han Tu, Arne Ludwig, Andreas Dirk Wieck, Shintaro Takada, Nobu‐Hisa Kaneko, Seddik Ouacel, Christopher Bäuerle, Michihisa Yamamoto
Standard approaches to quantum computing require significant overhead to correct for errors. The hardware size for conventional quantum processors in solids often increases linearly with the number of physical qubits, such as for transmon qubits in superconducting circuits or electron spin qubits in quantum dot arrays. While photonic circuits based on flying qubits do not suffer from decoherence or lack of potential scalability, they have encountered significant challenges to overcome photon loss in long delay circuits. Here, we propose an alternative approach that utilizes flying electronic wave packets propagating in solid-state quantum semiconductor circuits. Using a novel time-bin architecture for the electronic wave packets, hardware requirements are drastically reduced because qubits can be created on-demand and manipulated with a common hardware element, unlike the localized approach of wiring each qubit individually. The electronic Coulomb interaction enables reliable coupling and readout of qubits. Improving upon previous devices, we realize electronic interference at the level of a single quantized mode that can be used for manipulation of electronic wavepackets. This important landmark lays the foundation for fault-tolerant quantum computing with a compact and scalable architecture based on electron interferometry in semiconductors.
Standard approaches to quantum computing require significant overhead to correct for errors. The hardware size for conventional quantum processors in solids often increases linearly with the number of physical qubits, such as for transmon qubits in superconducting circuits or electron spin qubits in quantum dot arrays. While photonic circuits based on flying qubits do not suffer from decoherence or lack of potential scalability, they have encountered significant challenges to overcome photon loss in long delay circuits. Here, we propose an alternative approach that utilizes flying electronic wave packets propagating in solid-state quantum semiconductor circuits. Using a novel time-bin architecture for the electronic wave packets, hardware requirements are drastically reduced because qubits can be created on-demand and manipulated with a common hardware element, unlike the localized approach of wiring each qubit individually. The electronic Coulomb interaction enables reliable coupling and readout of qubits. Improving upon previous devices, we realize electronic interference at the level of a single quantized mode that can be used for manipulation of electronic wavepackets. This important landmark lays the foundation for fault-tolerant quantum computing with a compact and scalable architecture based on electron interferometry in semiconductors.
Scalable fault-tolerant quantum computer architectures require quantum gates that operate within a small fraction of the qubit decoherence time and with high accuracy over a bandwidth set by the decoherence rate. Electron spin quantum bits in Si are promising because of long decoherence times (∼0.5 ms), but electrical gating schemes still seem problematic. Oxide–semiconductor heterostructures have the potential for precise electrical control of gate operations in the semiconductor, using optical rectification in the ferroelectric oxide. Accurate (∼80 dB), local (∼10 nm), dynamic (>THz) and programmable optical control over electric polarization in the ferroelectric can be achieved using existing technology. Optical techniques may also be useful in rapid initialization of the quantum computer, and for providing a source of initialized qubits to use for quantum error correction. Advantages of optical methods will be discussed within a framework proposed for a quantum information processor using ferroelectrically coupled electron spins and Ge quantum dots in Si.
Electronic flying qubits offer an interesting alternative to photonic qubits: electrons propagate slower, hence easier to control in real time, and Coulomb interaction enables direct entanglement between different qubits. Although their coherence time is limited, flying electrons in the form of picosecond plasmonic pulses could be competitive in terms of the number of achievable coherent operations. The key challenge in achieving this critical milestone is the development of a new technology capable of injecting ‘on-demand’ single-electron wavepackets into quantum devices, with temporal durations comparable to or shorter than the device dimensions. Here, we take a significant step towards achieving this regime in a quantum nanoelectronic system by injecting ultrashort single-electron plasmonic pulses into a 14-micrometer-long Mach-Zehnder interferometer. Our results establish that quantum coherence is robust under the on-demand injection of ultrashort plasmonic pulses, as evidenced by the observation of coherent oscillations in the single-electron regime. Building on this, our results demonstrate the existence of a “non-adiabatic" regime that is prominent at high frequencies. This result highlights the potential of flying qubits as a promising alternative to localised qubit architectures, offering advantages such as a reduced hardware footprint, enhanced connectivity, and scalability for quantum information processing. The development of electronic flying qubits requires the ability to generate and control single-electron excitations. Here the authors demonstrate quantum coherence of ultrashort single-electron plasmonic pulses in an electronic Mach-Zehnder interferometer, revealing a non-adiabatic regime at high frequencies.
Universal quantum computing promises solutions to a wide range of problems of significant scientific and socioeconomic impact that are computationally intractable using classical hardware. Since physical qubits are inherently noisy and prone to decoherence, realizing a sufficient number of logical qubits to unlock practically relevant problem classes will likely require quantum error correction, resulting in an overhead of millions of physical qubits. Among all competing hardware platforms, spin qubits in gate-defined quantum dots are uniquely positioned: single- and two-qubit gate fidelities routinely exceed the error-correction threshold, and the experimentally proven compatibility with industrial-grade semiconductor manufacturing may enable millions of qubits on a single chip. Realizing this potential, however, requires quantum processor architectures that scale to large qubit numbers with two‑dimensional connectivity while maintaining high operational fidelities. Building on the theoretical feasibility of high‑fidelity spin‑coherent electron shuttling, the SpinBus architecture is introduced to enable scaling to application-relevant qubit numbers. The SpinBus architecture leverages the conveyor-mode shuttling device named Quantum Bus (QuBus) for coherent qubit coupling over micron‑scale distances to accommodate, at the level of the quantum processor chip, wiring fan‑out and locally integrated control electronics at cryogenic temperatures. Device simulations for all relevant operations in the Si/SiGe platform validate operation fidelities exceeding 99 % as well as compatibility with the requirements of established semiconductor patterning technology. Control with room‑temperature electronics plausibly supports at least 144 qubits, while substantially larger quantum processor sizes are conceivable using cryogenic control electronics. For the experimental realization of QuBus devices, a novel high‑yield multilayer electron-beam lithography process, which can readily be adapted to different device layouts, was developed to fabricate the required > 100 aligned metallic gate electrodes. Benchmarking with a semiconductor industry‑inspired methodology and inspection of > 100 devices demonstrated 99 % gate fabrication yield and at least 5 nm overlay accuracy. Utilizing GaAs/(Al,Ga)As QuBus prototype devices with a 7 µm shuttling channel for quantized-current experiments validated key criteria for conveyor-mode shuttling, in particular linear current scaling for operation frequencies up to 40 MHz, and provided preliminary evidence consistent with quantized conveyor-mode electron transfer. These results support the viability of conveyor-mode shuttling for qubit coupling and indicate the suitability of QuBus devices for metrological applications.
Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.
We recently proposed a quantum computing platform that exploits circuit-bound photons to create cluster states and achieve one-way measurement-based quantum computations on arrays of photonically interfaced solid-state spin qubits with long coherence-times. Single photons are used for spin initialization, readout and for photon-mediated long-range entanglement creation. In this conference talk, we elaborate on the challenges that are faced during any practical implementation of this architecture by breaking it down into the key physical building blocks. We further discuss the constraints imposed on the spin qubits and the photonic circuit components that are set by the requirements of achieving fault-tolerant performance.
In a large-scale quantum computer, the cost of communications will dominate the performance and resource requirements, place many severe demands on the technology, and constrain the architecture. Unfortunately, fault-tolerant computers based entirely on photons with probabilistic gates, though equipped with "built-in" communication, have very large resource overheads; likewise, computers with reliable probabilistic gates between photons or quantum memories may lack sufficient communication resources in the presence of realistic optical losses. Here, we consider a compromise architecture, in which semiconductor spin qubits are coupled by bright laser pulses through nanophotonic waveguides and cavities using a combination of frequent probabilistic and sparse determinstic entanglement mechanisms. The large photonic resource requirements incurred by the use of probabilistic gates for quantum communication are mitigated in part by the potential high-speed operation of the semiconductor nanophotonic hardware. The system employs topological cluster-state quantum error correction for achieving fault-tolerance. Our results suggest that such an architecture/technology combination has the potential to scale to a system capable of attacking classically intractable computational problems.