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arXiv:2409.13681

A fault-tolerant pairwise measurement-based code on eight qubits

Linnea Grans-Samuelsson, David Aasen, Parsa Bonderson

Published Sep 20, 2024• 0 citations
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Abstract

We construct a pairwise measurement-based code on eight qubits that is error correcting for circuit noise, with fault distance 3. The code can be implemented on a subset of a rectangular array of qubits with nearest neighbor connectivity of pairwise Pauli measurements, with a syndrome extraction circuit of depth 28. We describe fault-tolerant logical operations on patches of this eight-qubit code that generate the full Clifford group. We estimate the performance under circuit noise both during logical idle and during a logical two-qubit measurement. We estimate the pseudo-threshold to be between $10^{-5}$ and $2\times 10^{-4}$, depending on the amount of noise on idle physical qubits. The use of post-selection in addition to error correction (correcting all degree one faults and rejecting a subset of the higher degree faults) can improve the pseudo-threshold by up to an order of magnitude.

DOI
10.48550/arxiv.2409.13681

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We construct a pairwise measurement-based code on eight qubits that is error correcting for circuit noise, with fault distance 3. The code can be implemented on a subset of a rectangular array of qubits with nearest neighbor connectivity of pairwise Pauli measurements, with a syndrome extraction circuit of depth 28. We describe fault-tolerant logical operations on patches of this eight-qubit code that generate the full Clifford group. We estimate the performance under circuit noise both during logical idle and during a logical two-qubit measurement. We estimate the pseudo-threshold to be between 10−510^{-5}10−5 and 2×10−42\times 10^{-4}2×10−4, depending on the amount of noise on idle physical qubits. The use of post-selection in addition to error correction (correcting all degree one faults and rejecting a subset of the higher degree faults) can improve the pseudo-threshold by up to an order of magnitude.
We construct a pairwise measurement-based code on eight qubits that is error-correcting for circuit noise, with fault distance 3. The code can be implemented on a subset of a rectangular array of qubits with nearest-neighbor connectivity of pairwise Pauli measurements, with a syndrome extraction circuit of depth 28. We describe fault-tolerant logical operations on patches of this eight-qubit code that generate the full Clifford group. We estimate the performance under circuit noise both during logical idle and during a logical two-qubit measurement. We estimate the pseudothreshold to be between ${10}^{\ensuremath{-}5}$ and $2\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}4}$, depending on the amount of noise on idle physical qubits. The use of postselection in addition to error correction (correcting all degree-one faults and rejecting a subset of the higher degree faults) can improve the pseudothreshold by up to an order of magnitude.
We devise a new realization of the surface code on a rectangular lattice of qubits utilizing single-qubit and nearest-neighbor two-qubit Pauli measurements and three auxiliary qubits per plaquette. This realization gains substantial advantages over prior pairwise measurement-based realizations of the surface code. It has a short operation period of 4 steps and our performance analysis for a standard circuit noise model yields a high fault-tolerance threshold of approximately 0.66 % . The syndrome extraction circuits avoid bidirectional hook errors, so we can achieve full code distance by choosing appropriate boundary conditions. We also construct variants of the syndrome extraction circuits that entirely prevent hook errors, at the cost of larger circuit depth. This achieves full distance regardless of boundary conditions, with only a modest decrease in the threshold. Furthermore, we propose an efficient strategy for dealing with dead components (qubits and measurements) in our surface code realization, which can be adopted more generally for other surface code realizations. This new surface code realization is highly optimized for Majorana-based hardware, accounting for constraints imposed by layouts and the implementation of measurements, making it competitive with the recently proposed Floquet codes.
Abstract The accumulation of physical errors 1–3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction 4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm 5 . We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes 6 . Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code 7–10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length- n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.
Syndrome measurements enable deterministic fault-tolerant TTT gates
Non-Clifford gates are essential for universal quantum computation, yet implementing them fault-tolerantly remains a central challenge for stabilizer codes. Here, we show how a syndrome degree of freedom can mediate a logical non-Clifford gate. Releasing one stabilizer check makes an additional logical qubit available within the encoded data block. Two Pauli rotations, followed by syndrome measurement and Clifford feed-forward, then implement a deterministic logical TTT gate on every stabilizer code of distance at least two, in a suitable logical basis. During the ideal rotations, the state remains in an intermediate stabilizer code whose distance we determine exactly. For pure codes with a balanced factorization, this distance grows with the original code distance, whereas the maximum weight of the stabilizer generators bounds the intermediate distance from above. We realize the mechanism in two circuits that tolerate a single fault under local stochastic circuit noise: a fixed 22-qubit construction admitting recursive error suppression and a direct Golay-code gate protected by measuring a stabilizer check transported through the non-Clifford rotation, which can recover the unknown encoded state even after rejection. Serial implementations with ancilla reuse, reset, and flexible two-qubit connectivity require at most 33 and 32 physical qubits, respectively. These results establish a general mechanism for logical non-Clifford gates and demonstrate how syndrome measurements and recovery can protect the intermediate evolution of encoded information.
Benchmarking physical devices and verifying logical algorithms are important tasks for scalable fault-tolerant quantum computing. Numerous protocols exist for benchmarking devices before running actual algorithms. In this work, we show that both physical and logical errors of fault-tolerant circuits can even be characterized in-situ using syndrome data. To achieve this, we map general fault-tolerant Clifford circuits to subsystem codes using the spacetime code formalism and develop a scheme for estimating Pauli noise in Clifford circuits using syndrome data. We give necessary and sufficient conditions for the learnability of physical and logical noise from given syndrome data, and show that we can accurately predict logical fidelities from the same data. Importantly, our approach requires only a polynomial sample size, even when the logical error rate is exponentially suppressed by the code distance, and thus gives an exponential advantage against methods that use only logical data such as direct fidelity estimation. We demonstrate the practical applicability of our methods in various scenarios using synthetic data as well as the experimental data from a recent demonstration of fault-tolerant circuits by Bluvstein et al. [Nature 626, 7997 (2024)]. Our methods provide an efficient, in-situ way of characterizing a fault-tolerant quantum computer to help gate calibration, improve decoding accuracy, and verify logical circuits.
Quantum error correction protects fragile quantum information by encoding it into a larger quantum system. These extra degrees of freedom enable the detection and correction of errors, but also increase the operational complexity of the encoded logical qubit. Fault-tolerant circuits contain the spread of errors while operating the logical qubit, and are essential for realizing error suppression in practice. While fault-tolerant design works in principle, it has not previously been demonstrated in an error-corrected physical system with native noise characteristics. In this work, we experimentally demonstrate fault-tolerant preparation, measurement, rotation, and stabilizer measurement of a Bacon-Shor logical qubit using 13 trapped ion qubits. When we compare these fault-tolerant protocols to non-fault tolerant protocols, we see significant reductions in the error rates of the logical primitives in the presence of noise. The result of fault-tolerant design is an average state preparation and measurement error of 0.6% and a Clifford gate error of 0.3% after error correction. Additionally, we prepare magic states with fidelities exceeding the distillation threshold, demonstrating all of the key single-qubit ingredients required for universal fault-tolerant operation. These results demonstrate that fault-tolerant circuits enable highly accurate logical primitives in current quantum systems. With improved two-qubit gates and the use of intermediate measurements, a stabilized logical qubit can be achieved.