Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2408.00904

Demonstrating the Potential of Adaptive LMS Filtering on FPGA-Based Qubit Control Platforms for Improved Qubit Readout in 2D and 3D Quantum Processing Units

Hans Johnson, Nicholas Bornman, Tae-Yoon Kim, D. M. T. van Zanten, Silvia Zorzetti, Jafar Saniie

Published Sep 26, 2024• 1 citation
arXivHTMLPDF

Abstract

Current Methodology• Readout pulses are very noisy!• The current method to average readout pulses in post processing for qubit readout works for smaller systems.However, this has limitations as qubit systems scale up.100,000 averages Phase Sweep @ ~6.3 GHz for single-shot time trace readout Ground State Excited State
DOI
10.2172/2448585

Related papers

Improving Signal-to-Noise Ratio (SNR) for Quantum Readout Signals Using Adaptive Hardware Filters on FPGA

Hans Johnson, Silvia Zorzetti, Jafar Saniie

This research presents an innovative approach to improving the Signal-to-Noise Ratio (SNR) in superconducting quantum computing readout signals, utilizing FPGA-based adaptive filtering on the control board. Our solution aims to bolster quantum computations' reliability by providing a more accurate and precise way to obtain our readout traces and achieve a higher discernability between excitation states in real-time.

•Sep 8, 2023•0 citations

Quantum Control Architecture and Circuit Blocks for Solid-State Microwave Qubits

Fatemeh Nikbakhtnasrabadi, Martin P. Weides

Quantum computing has made significant strides, with hardware platforms now advanced enough to tackle the challenges of scaling up to larger and more robust systems. Central to this progression is the interface between quantum processors, comprising isolated qubits, and the classical systems required for their control and readout. As these systems transition from few-qubit devices to fault-tolerant architectures, the complexity of this quantum-classical interaction poses significant engineering challenges. Field-Programmable Gate Arrays (FPGAs) have emerged as an adaptable and efficient solution, offering realtime control, low-latency operations, and seamless integration. This review delves into current FPGA-based platforms, including commercial systems, as well as open-source solutions developed by academic research groups. The architecture, features, and contributions of these platforms to addressing scalability and integration issues are thoroughly examined. Additionally, the review highlights innovations in cryogeniccompatible controllers and explores the potential of Cryo-FPGAs to reduce noise and improve fidelity in quantum systems. By providing a comprehensive analysis of current technologies and identifying opportunities for advancement, this review offers valuable insights for researchers and engineers working to develop scalable quantum computing solutions.

•Feb 11, 2025•0 citations

Improving Signal Signal-to -Noise Ratio (SNR) for Quantum Readout Signals Using Adaptive Hardware Filters on FPGA

Hans Johnson

This research presents an innovative approach to improving theSignalSignal-to -Noise Ratio (SNR) in superconducting quantumcomputing readout signals, utilizing adaptive filtering on thecontrol board. Our solution FPGA FPGA-based aims to bolsterquantum computations' reliability by providing a more accurateand precise way to obtain our readout traces and achieve ahigher discernability between excitation states in real real-time.

•Nov 22, 2023•0 citations

QubiC 2.0: An Extensible Open-Source Qubit Control System Capable of Mid-Circuit Measurement and Feed-Forward

Yilun Xu, Gang Huang, Neelay Fruitwala +10 more

Researchers manipulate and measure quantum processing units via the classical electronics control system. We developed an open-source FPGA-based quantum bit control system called QubiC for superconducting qubits. After years of qubit calibration and testing experience on QubiC 1.0, we recognized the need for mid-circuit measurement and feed-forward capabilities to implement advanced quantum algorithms, and upgraded the system to QubiC 2.0 on an AMD ZCU216 RFSoC evaluation board with all these enriched features. The system uses portable FPGA gateware with a simplified processor to handle commands on-the-fly. For design simplicity and straightforward scaling, we adopted a multi-core distributed architecture, assigning one processor core per qubit. The pulses combine the unique pulse envelope and carrier information specified in a command. Each pulse envelope is pre-stored in the FPGA's block RAMs, ensuring speed and reusability throughout the quantum circuit, while pulse parameters including amplitude, phase, and frequency can be updated from pulse to pulse. The software stack is developed in Python, running on both the FPGA's ARM core and a host computer via XML-RPC. Quantum circuits can be described in a high-level language supporting both pulse-level and native-gate-level programming with high-level control flow constructs, and are compiled into binary commands loaded into the FPGA. With QubiC 2.0, we achieved multi-FPGA synchronization and low-latency data communication, and demonstrated feed-forward experiments on conditional circuits. The system also serves as a platform for artificial intelligence and machine learning driven quantum control, such as FPGA-based real-time quantum state discrimination. The enhanced QubiC system provides researchers with powerful tools to explore and implement advanced quantum algorithms and applications.

arXiv:2309.10333•Sep 19, 2023•5 citations

Real-Time Adaptive Filtering and the Boxcar Limit in Superconducting Qubit Readout

Hans Johnson, Tanay Roy, Leonardo Bove +3 more

Control and readout systems for superconducting quantum computing support real-time control and high-fidelity qubit-state discrimination. We examine when additional digital processing improves readout fidelity. A common baseline for dispersive readout uses a boxcar averager to compute a uniformly weighted average over a fixed window followed by threshold-based state assignment. We evaluated an adaptive finite-impulse-response (FIR) filter trained in real time using the least-mean-squares (LMS) algorithm on a field-programmable gate array (FPGA) quantum controller. We also analyzed measured readout shots offline to compare the frozen filter with boxcar averaging, and evaluate per-sample weighting plus sequential detection. For the fixed FIR filters tested, summing the filtered samples gives the boxcar sum multiplied by one complex number apart from a small edge correction. We call this the kernel collapse. The multiplication scales the state separation and noise equally without improving state discrimination, and we call this the boxcar limit. The frozen LMS filter reduces trace noise, but shows no resolved improvement in readout fidelity. On a 2D transmon, optimizing the readout window accounted for much of the improvement over full-window integration. We then examined how changing the decision method could reduce calibration effort and decision time. On a higher-fidelity 3D ancilla readout, our modeled template estimation reached the same fidelity target as direct averaging with 89.8% fewer labeled shots per state. Offline sequential replay assigned most shots before the acquisition window ended. These results distinguish waveform denoising from state-discrimination improvement, and motivate direct control of decision weights and assignment time in dispersive readout.

quant-pharXiv:2610.00783•Oct 2, 2026•0 citations

Exploration of Optimizing FPGA-based Qubit Controller for Experiments on Superconducting Quantum Computing Hardware

Hans Johnson

identify some key target areas for optimizing control electronics for superconducting qubit architectures and provide some preliminary results to the resolution of a control pulse waveform. With optimizations targeted at 3D superconducting qubit setups, we hope to bring to light some of the requirements in classical computational methodologies to bring out the full potential of this quantum computing architecture, and to convey the excitement of progress in this research.

•May 26, 2023•1 citation
Quantum computing has made significant strides, with hardware platforms now advanced enough to tackle the challenges of scaling up to larger and more robust systems. Central to this progression is the interface between quantum processors, comprising isolated qubits, and the classical systems required for their control and readout. As these systems transition from few-qubit devices to fault-tolerant architectures, the complexity of this quantum-classical interaction poses significant engineering challenges. Field-Programmable Gate Arrays (FPGAs) have emerged as an adaptable and efficient solution, offering realtime control, low-latency operations, and seamless integration. This review delves into current FPGA-based platforms, including commercial systems, as well as open-source solutions developed by academic research groups. The architecture, features, and contributions of these platforms to addressing scalability and integration issues are thoroughly examined. Additionally, the review highlights innovations in cryogeniccompatible controllers and explores the potential of Cryo-FPGAs to reduce noise and improve fidelity in quantum systems. By providing a comprehensive analysis of current technologies and identifying opportunities for advancement, this review offers valuable insights for researchers and engineers working to develop scalable quantum computing solutions.
Researchers manipulate and measure quantum processing units via the classical electronics control system. We developed an open-source FPGA-based quantum bit control system called QubiC for superconducting qubits. After years of qubit calibration and testing experience on QubiC 1.0, we recognized the need for mid-circuit measurement and feed-forward capabilities to implement advanced quantum algorithms, and upgraded the system to QubiC 2.0 on an AMD ZCU216 RFSoC evaluation board with all these enriched features. The system uses portable FPGA gateware with a simplified processor to handle commands on-the-fly. For design simplicity and straightforward scaling, we adopted a multi-core distributed architecture, assigning one processor core per qubit. The pulses combine the unique pulse envelope and carrier information specified in a command. Each pulse envelope is pre-stored in the FPGA's block RAMs, ensuring speed and reusability throughout the quantum circuit, while pulse parameters including amplitude, phase, and frequency can be updated from pulse to pulse. The software stack is developed in Python, running on both the FPGA's ARM core and a host computer via XML-RPC. Quantum circuits can be described in a high-level language supporting both pulse-level and native-gate-level programming with high-level control flow constructs, and are compiled into binary commands loaded into the FPGA. With QubiC 2.0, we achieved multi-FPGA synchronization and low-latency data communication, and demonstrated feed-forward experiments on conditional circuits. The system also serves as a platform for artificial intelligence and machine learning driven quantum control, such as FPGA-based real-time quantum state discrimination. The enhanced QubiC system provides researchers with powerful tools to explore and implement advanced quantum algorithms and applications.
Control and readout systems for superconducting quantum computing support real-time control and high-fidelity qubit-state discrimination. We examine when additional digital processing improves readout fidelity. A common baseline for dispersive readout uses a boxcar averager to compute a uniformly weighted average over a fixed window followed by threshold-based state assignment. We evaluated an adaptive finite-impulse-response (FIR) filter trained in real time using the least-mean-squares (LMS) algorithm on a field-programmable gate array (FPGA) quantum controller. We also analyzed measured readout shots offline to compare the frozen filter with boxcar averaging, and evaluate per-sample weighting plus sequential detection. For the fixed FIR filters tested, summing the filtered samples gives the boxcar sum multiplied by one complex number apart from a small edge correction. We call this the kernel collapse. The multiplication scales the state separation and noise equally without improving state discrimination, and we call this the boxcar limit. The frozen LMS filter reduces trace noise, but shows no resolved improvement in readout fidelity. On a 2D transmon, optimizing the readout window accounted for much of the improvement over full-window integration. We then examined how changing the decision method could reduce calibration effort and decision time. On a higher-fidelity 3D ancilla readout, our modeled template estimation reached the same fidelity target as direct averaging with 89.8% fewer labeled shots per state. Offline sequential replay assigned most shots before the acquisition window ended. These results distinguish waveform denoising from state-discrimination improvement, and motivate direct control of decision weights and assignment time in dispersive readout.