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arXiv:2408.00077 · Physical Review Research

Quantum circuit compilation with quantum computers

Davide Rattacaso, Daniel Jaschke, Marco Ballarin, Ilaria Siloi, Simone Montangero

Published Aug 20, 2025• 7 citations
arXivHTMLPDF

Abstract

Compilation optimizes quantum algorithms’ performances on real-world quantum computers. To date, it is performed via classical optimization strategies. We introduce a class of quantum algorithms to perform compilation via quantum computers, paving the way for a quantum advantage in compilation. We demonstrate the effectiveness of this approach via quantum and simulated annealing-based compilation: We successfully compile a Trotterized Hamiltonian simulation with up to 64 qubits and 64 time steps and a quantum Fourier transform with up to 40 qubits and 771 time steps. We show that, for a translationally invariant circuit, the compilation results in a fidelity gain that grows extensively in the size of the input circuit, outperforming any local or quasilocal compilation approach.

DOI
10.1103/hcz4-nv2y

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Asian Conference on Innovation in Technology (ASIANCON)•Aug 22, 2025•1 citation
Compilation optimizes quantum algorithms’ performances on real-world quantum computers. To date, it is performed via classical optimization strategies. We introduce a class of quantum algorithms to perform compilation via quantum computers, paving the way for a quantum advantage in compilation. We demonstrate the effectiveness of this approach via quantum and simulated annealing-based compilation: We successfully compile a Trotterized Hamiltonian simulation with up to 64 qubits and 64 time steps and a quantum Fourier transform with up to 40 qubits and 771 time steps. We show that, for a translationally invariant circuit, the compilation results in a fidelity gain that grows extensively in the size of the input circuit, outperforming any local or quasilocal compilation approach.
Quantum circuit compilation is a critical step in realizing quantum algorithms on real quantum hardware. Traditional compilation methods often employ static optimization strategies, neglecting the unique constraints and characteristics of the target quantum device. This paper introduces a novel adaptive quantum circuit compilation framework designed to dynamically adjust circuit designs based on hardware-specific information, aiming to minimize gate count and, consequently, error rates. The core of the framework lies in integrating a hardware simulator directly within the compilation process. This allows the compiler to evaluate the performance of various circuit designs—considering factors like qubit connectivity, gate fidelity, and decoherence models—before committing to a final layout. The proposed approach represents a shift from static to adaptive optimization, providing a more nuanced and effective strategy for translating quantum algorithms into executable code on diverse quantum hardware platforms. This research demonstrates a significant potential improvement in quantum circuit efficiency and fidelity, addressing a key bottleneck in the advancement of quantum computing.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.512.512.5 for N=12N=12N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30N=30N=30 reveal that the optimal depth dmaxd_{\rm max}dmax​ to achieve maximal overall fidelity is independent of system size NNN, suggesting the scalability of our method for large quantum devices in terms of quantum resources.
This paper discusses the compilation, optimization, and error mitigation of quantum algorithms, essential steps to execute real-world quantum algorithms. Quantum algorithms running on a hybrid platform with QPU and CPU/GPU take advantage of existing high-performance computing power with quantum-enabled exponential speedups. The proposed approximate quantum Fourier transform (AQFT) for quantum algorithm optimization improves the circuit execution on top of an exponential speed-ups the quantum Fourier transform has provided.
Quantum circuit compilation is a crucial step in transforming a high-level quantum algorithm description into a sequence of gates executable on a specific quantum hardware platform. Traditional compilation methods predominantly focus on minimizing gate count and circuit depth, often overlooking the significant impact of quantum coherence on the overall fidelity of the computation. This paper introduces an adaptive quantum circuit compilation algorithm designed to mitigate this limitation. The algorithm dynamically analyzes the coherence properties of the quantum circuit during the compilation process, aiming to preserve coherence while simultaneously minimizing detrimental decoherence effects. This approach represents a fundamental shift in the compilation paradigm, directly addressing the critical challenge of coherence maintenance in quantum computing. The proposed methodology utilizes a novel metric for coherence analysis and employs an adaptive optimization strategy to achieve superior circuit fidelity compared to conventional compilation techniques. The effectiveness of the algorithm is demonstrated through theoretical analysis and a detailed explanation of its components, paving the way for more robust and accurate quantum circuit implementations.
Quantum circuit compilation is a crucial step in the process of executing quantum algorithms on near-term quantum hardware. The challenge lies in translating high-level quantum algorithms, often expressed using universal gate sets, into efficient, gate-level circuits that minimize gate count and circuit depth, thereby reducing error rates and improving execution times. Traditional compilation methods often rely on hand-crafted heuristics or limited search algorithms, failing to fully explore the exponentially large search space of possible circuit transformations. This work proposes an adaptive quantum circuit compilation framework leveraging Bayesian optimization. The system dynamically explores the space of potential circuit transformations, learning to identify optimal compilation strategies through a probabilistic modeling approach. The core claim is that Bayesian optimization can effectively adaptively compile quantum circuits, optimizing for performance and minimizing gate count. The system incorporates a compiler that utilizes Bayesian optimization to explore the vast space of possible quantum circuit transformations, learning to identify the most efficient compilation strategies. The results demonstrate the potential of this approach to significantly reduce the complexity of quantum circuits while maintaining algorithm fidelity.
Hybridizing machine learning (ML) with quantum computing has become an attractive strategy to increase computational power on Noisy Intermediate Scale Quantum (NISQ) devices. Although these can be potentially quantum advantage devices, their qubit numbers and noise are bounded and there are challenges when it comes to practical quantum circuit realization. This work concentrates on the creation of optimized quantum circuits via ML-based strategies, to enhance the performance of the circuits, to reduce the error rate and to accommodate the particular noise profile of the hardware of NISQ devices. The resulting suboptimal mappings with little or no consideration of noise and hardware topology in traditional quantum compilers can ruin the fidelity of quantum algorithm. Leveraging machine learning, and specifically reinforcement and supervised learning methods, our method learns to optimize compilation strategy for specific quantum hardware architecture. The paper proposes a framework that uses machine learning models to predict qubit mappings, gate decompositions, and transpilation paths that minimize gate depth and error accumulation. We also investigate transfer learning methods for propagating the learned compilation strategies to novel NISQ machines. Such methods are empirically validated on both simulated and real quantum hardware backends, providing evidence of circuit depth, execution time and error reductions. The results show that ML-assisted compilation can achieve better success probabilities for benchmark quantum algorithms like VQE and QAOA than conventional compilers. Furthermore, the work examines the interpretability of ML models providing hardware-aware optimization recommendations and understanding the noise patterns and methods of error correction. Our work highlights the key role of ML for transferring between theoretical quantum algorithms and their practical NISQ implementations. This integration boosts the immediate applicability of existing quantum devices and provides a basis for adaptive and scalable likelihood-based compilation for the era of fault-tolerant quantum computation. Our results motivate further investigation of hybrid classical-quantum workflows, in which ML iteratively improves compilation in accordance with changing hardware noise and capabilities. By improving quantum circuit compilation onNISQ computers, this work is taking steps toward the realization of quantum advantage in application scenarios such as optimization, cryptography, and quantum simulation without needing to wait for fully fault-tolerant large-scale quantum computers.