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arXiv:2406.03328 · Applied Physics Letters

Leveraging off-the-shelf silicon chips for quantum computing

John Michniewicz, M. S. Kim

Published Jun 24, 2024• 5 citations
arXivHTMLPDF

Abstract

There is a growing demand for quantum computing across various sectors, including finance, materials, and studying chemical reactions. A promising implementation involves semiconductor qubits utilizing quantum dots within transistors. While academic research labs currently produce their own devices, scaling this process is challenging, requires expertise, and results in devices of varying quality. Some initiatives are exploring the use of commercial transistors, offering scalability, improved quality, affordability, and accessibility for researchers. This paper delves into potential realizations and the feasibility of employing off-the-shelf commercial devices for qubits. It addresses challenges such as noise, coherence, limited customizability in large industrial fabs, and scalability issues. The exploration includes discussions on potential manufacturing approaches for early versions of small qubit chips. The use of state-of-the-art transistors as hosts for quantum dots, incorporating readout techniques based on charge sensing or reflectometry, and methods like electron shuttling for qubit connectivity are examined. Additionally, more advanced designs, including 2D arrays and crossbar or DRAM-like access arrays, are considered for the path toward accessible quantum computing.

DOI
10.1063/5.0207162

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The understanding of quantum mechanics enabled the development of technology such as transistors and has been the foundation of today’s information age. Actively using quantum mechanics to build quantum technology may cause a second revolution in handling information. However, to execute meaningful algorithms, largescale quantum computers have to be built. Such systems are constructed from many qubits, the quantum version of the classical bit. While exciting progress is being made across a range of different qubit platforms, achieving the radical scalability that is necessary to build a largescale processor could be a roadblock. Huge challenges are put on reproducibility, inand output connectivity and material quality. Qubits based on the spins of electrons and holes confined in semiconductor quantum dots may have an important advantage in constructing quantum processors. This platform can profit from the advanced semiconductor industry that was responsible for the first computing revolution. Group IV semiconductors such as silicon and germanium have a high compatibility with industrial semiconductor manufacturing and contain stable isotopes with zero nuclear spin. The materials can be isotopically purified and serve as excellent hosts for spins with long quantum coherence. In Chapter 3 we present quantum dot arrays in silicon metaloxidesemiconductor (SiMOS), strained silicon (Si/SiGe) and strained germanium (Ge/SiGe). A nearly identical integration scheme based on an overlapping gate structure can be used to define quantum dots in each platform. Each platform has its own opportunities, which are carefully assessed. By employing charge sensing we confirm that all quantum dots can be depleted to the singleelectron regime. We compare capacitive crosstalk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. Using this crossplatform integration, we can study qubits in each platform with minimal overhead. Long coherence times, excellent singlequbit gate fidelities and twoqubit logic have been demonstrated with SiMOS spin qubits, making it one of the leading platforms for quantum information processing. However, due to the high disorder at the Si/SiO2 interface compared to Ge/SiGe and Si/SiGe interface, quantum dots defined in SiMOS are small and achieving sufficient control over single electrons has been a long standing challenge. In Chapter 5 we show experiments on a double quantum dot that can be isolated from its reservoir. We demonstrate a tunable tunnel coupling between single electrons up to 13 GHz and tunable tunnel rates down to below 1 Hz. These results mark an important step towards the required degree of control over the location of and coupling between quantum dots, necessary for the operation of a large array.
Abstract Quantum computation (QC) is one of the most challenging quantum technologies that promise to revolutionize data computation in the long-term by outperforming the classical supercomputers in specific applications. Errors will hamper this quantum revolution if not sufficiently limited and corrected by quantum error correction codes thus avoiding quantum algorithm failures. In particular millions of highly-coherent qubits arranged in a two-dimensional array are required to implement the surface code, one of the most promising codes for quantum error correction. One of the most attractive technologies to fabricate such large number of almost identical high-quality devices is the well known metal-oxide-semiconductor technology. Silicon quantum processor manufacturing can leverage the technological developments achieved in the last 50 years in the semiconductor industry. Here, we review modeling, fabrication aspects and experimental figures of merit of qubits defined in the spin degree of freedom of charge carriers confined in quantum dots and donors in silicon devices along with classical electronics innovations for qubit control and readout. Furthermore, we discuss potential applications of the technology and finally we review the role of start-ups and companies in the silicon-based QC era.
Quantum chips form the foundational hardware for quantum computing, promising transformative impacts across optimization, secure communications, and artificial intelligence. This paper surveys five leading qubit implementations—superconducting circuits, neutral-atom arrays, trapped ions, photonic systems, and silicon-based quantum dots—highlighting their distinct operating principles, recent milestones, and inherent trade-offs. Superconducting platforms leverage mature microfabrication to achieve hundreds to thousands of qubits with rapid gate times but require millikelvin environments and face millisecond-scale coherence limits. Neutral-atom and ion-trap architectures offer exceptionally long coherence (seconds to hours) and high-fidelity operations, making them ideal for quantum memory and precision simulation, yet scaling remains constrained by control complexity. Photonic chips excel at room-temperature operation and quantum networking via entangled photons, though deterministic two-qubit gates and on-chip integration pose challenges. Silicon quantum dots promise CMOS compatibility and sub-microsecond spin coherence, but demand atomic-scale fabrication precision and advanced cryogenic control. We analyze the tension between qubit count, error rates, and engineering practicality, and discuss emerging solutions such as hybrid integration, advanced error-correction codes, and novel materials. Looking ahead, coordinated optimization across these platforms—combining fast superconducting processors, long-lived atomic memories, photonic interconnects, and scalable silicon arrays—will be critical to transition quantum chips from research prototypes to industrially viable systems that redefine computing, communications, and AI.
Quantum computing is predicted to provide unprecedented enhancements in computational power. A quantum computer requires implementation of a well-defined and controlled quantum system of many interconnected qubits, each defined using fragile quantum states. The interest in a spin-based quantum computer in silicon stems from demonstrations of very long spin-coherence times, high-fidelity single spin control and compatibility with industrial mass-fabrication. Industrial scale fabrication of the silicon platform offers a clear route towards a large-scale quantum computer, however, some of the processes and techniques employed in qubit demonstrators are incompatible with a dense and foundry-fabricated architecture. In particular, spin-readout utilises external sensors that require nearly the same footprint as qubit devices. In this thesis, improved readout techniques for silicon quantum devices are presented and routes towards implementation of a scalable and high-sensitivity readout architecture are investigated. Firstly, readout sensitivity of compact gate-based sensors is improved using a high-quality factor resonator and Josephson parametric amplifier that are fabricated separately from quantum dots. Secondly, an integrated transistor-based control circuit is presented using which sequential readout of two quantum dot devices using the same gate-based sensor is achieved. Finally, a large-scale readout architecture based on random-access and frequency multiplexing is introduced. The impact of readout circuit footprint on readout sensitivity is determined, showing routes towards integration of conventional circuits with quantum devices in a dense architecture, and a fault-tolerant architecture based on mediated exchange is introduced, capable of relaxing the limitations on available control circuit footprint per qubit. Demonstrations are based on foundry-fabricated transistors and few-electron quantum dots, showing that industry fabrication is a viable route towards quantum computation at a scale large enough to begin addressing the most challenging computational problems.
For the realization of a quantum computer, a good qubit design as the basic building block is a nontrivial starting point. To fully leverage the potential of quantum computing, quantum processors will likely have to incorporate billions of high-quality qubits. Several approaches are being pursued and exhibit different strength and weaknesses. The device concepts and fabrication procedures for semiconductor based qubits are very similar to those used in the semiconductor industry. Using the spin-degree of freedom, their coherence properties and the quality of single-qubit operations have now reached the required level and are on par with competing approaches. Two-qubit operations will likely follow suit in the near future. With these basic requirements being met, it is now time to think if and how increasingly large multi-qubit systems and eventually functional quantum processor can be realized. This quest raises many pertinent questions, some of which equally apply to other qubit platforms. How reproducibly can the different types of semiconductor qubits be produced? How can their operating point be adjusted efficiently and in an automated way? How can they be connected to form meaningful multi-qubit circuits? How severe are multi-qubit control issues such as crosstalk and frequency crowding, and how can they be avoided? What control system architectures are most suitable for operating large numbers of qubits? What is the limit of cryogenic electronics regarding power consumption and integration density? This paper gives a (partial) overview of the state of the art in the field and discusses future challenges associated with the realization of large-scale quantum processors, many of which will greatly benefit from input from engineering science. The guiding vision is that of a highly integrated quantum processor with an ultra-low power cryogenic control system.