The preparation of a quantum state using a noisy quantum computer (gate noise strength
δ) will necessarily affect an O(
δ)-fraction of the qubits, no matter which protocol is used. Here, we show that fault-tolerant quantum state preparation can be achieved with constant space overhead improving on previous constructions requiring polylogarithmic overhead.
To achieve this, we add to the toolbox of fault-tolerant schemes for circuits with quantum input and output. More specifically, we construct fault-tolerant interfaces that decrease the level of protection for quantum low-density parity-check (LDPC) codes. When information is encoded in multiple code blocks, our interfaces have constant space overhead.
In our decoder construction that change the level of protection by an arbitrary amount, we circumvent bottlenecks to error pileup and overhead by gradual lowering of the level of encoding at the same time as we increase the number of blocks on which decoding is carried out simultaneously.
I propose encoder and decoder architectures for entanglement-assisted (EA) quantum low-density parity-check (LDPC) codes suitable for all-optical implementation. I show that two basic gates needed for EA quantum error correction, namely, controlled-NOT (CNOT) and Hadamard gates can be implemented based on Mach-Zehnder interferometer. In addition, I show that EA quantum LDPC codes from balanced incomplete block designs of unitary index require only one entanglement qubit to be shared between source and destination.
Vast numbers of qubits will be needed for large-scale quantum computing because of the overheads associated with error correction. We present a scheme for low-overhead fault-tolerant quantum computation based on quantum low-density parity-check (LDPC) codes, where long-range interactions enable many logical qubits to be encoded with a modest number of physical qubits. In our approach, logic gates operate via logical Pauli measurements that preserve both the protection of the LDPC codes and the low overheads in terms of the required number of additional qubits. Compared with surface codes with the same code distance, we estimate order-of-magnitude improvements in the overheads for processing around 100 logical qubits using this approach. Given the high thresholds demonstrated by LDPC codes, our estimates suggest that fault-tolerant quantum computation at this scale may be achievable with a few thousand physical qubits at comparable error rates to what is needed for current approaches.
We propose fault-tolerant quantum encoders for Calderbank-Shor-Steane (CSS) and non-CSS codes over qudits by utilizing
g-partite maximally entangled states. The qudits are grouped into
g contiguous blocks such that entangled states are shared across the blocks, and multiqudit gates are applied locally to restrict the error propagation within each block. We also propose a transversal fault-tolerant block decoder to decode the blocks individually and recover the complete encoded quantum information. The optimum value of
g to obtain an improvement in the probability of error propagation of the proposed encoders against non-fault-tolerant schemes is analytically determined for application in the encoding circuit. The proposed fault-tolerant scheme with entanglement assistance scales linearly with the number of
g-partite entangled states and overcomes the limitations of diminishing coding rates for higher levels of concatenation within the concatenated coding scheme. We validate the proposed ideas by constructing fault-tolerant encoding circuits for the non-CSS
[[5,1,3]]3 code and the
[[7,1,3]]3 CSS code through illustrative examples. We reduced the probability of error propagation from 0.248 to 0.212 for the
[[5,1,3]]3 code and from 0.207 to 0.174 for the
[[7,1,3]]3 code. For example, over
[[100,70]]2 quantum code without any fault tolerance, using three-partite entangled pairs, one can get two orders of improvement (1e-2) in the probability of error propagation compared to the non-fault-tolerant encoder by encoding over 190 physical qubits with the same number of stabilizers.
In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation.
We present a set of efficiently implementable logical multi-qubit gates in concatenated quantum error correction codes using parity qubits. In particular, we show how fault-tolerant high-weight rotation gates of arbitrary angle can be implemented on single physical qubits of a classical stabilizer code, or on localized regions of full quantum error correction codes. Similarly, we show how transversal CNOT gates can implement logical parity-controlled-NOT operations between arbitrarily many logical qubits. Both operation types can be implemented and in many cases parallelized without the use of lattice surgery or the need for complicated routing operations.