Achieving practical quantum advantage requires a classical decoding algorithm to identify and correct faults during computation. This classical decoding algorithm must deliver both accuracy and speed, but in what combination? When is a decoder "fast enough" or "accurate enough"? In the case of surface codes, tens of decoding algorithms have been proposed, with different accuracies and speeds. However, it has been unclear how to choose the best decoder for a given quantum architecture. Should a faster decoder be used at the price of reduced accuracy? Or should a decoder sacrifice accuracy to fit within a given time constraint? If a decoder is too slow, it may be stopped upon reaching a time bound, at the price of some time-out failures and an increased failure rate. What then is the optimal stopping time of the decoder? By analyzing the speed vs. accuracy tradeoff, we propose strategies to select the optimal stopping time for a decoder for different tasks. We design a protocol to select the decoder that minimizes the spacetime cost per logical gate, for logical computation of a given depth. Our protocol enables comparison of different decoders, and the selection of an appropriate decoder for a given fault-tolerant quantum computing architecture. We illustrate our protocol for the surface code equipped with a desktop implementation of the PyMatching decoder. We estimate PyMatching is fast enough to implement thousands of logical gates with a better accuracy than physical qubits. However, we find it is not sufficiently fast to reach 10^5 logical gates, under certain assumptions, due to the decoding delay which forces qubits to idle and accumulate errors while idling. We expect further improvements to PyMatching are possible by running it on a better machine or by reducing the OS interference.
Achieving practical quantum advantage requires a classical decoding algorithm to identify and correct faults during computation. This classical decoding algorithm must deliver both accuracy and speed, but in what combination? When is a decoder "fast enough" or "accurate enough"? In the case of surface codes, tens of decoding algorithms have been proposed, with different accuracies and speeds. However, it has been unclear how to choose the best decoder for a given quantum architecture. Should a faster decoder be used at the price of reduced accuracy? Or should a decoder sacrifice accuracy to fit within a given time constraint? If a decoder is too slow, it may be stopped upon reaching a time bound, at the price of some time-out failures and an increased failure rate. What then is the optimal stopping time of the decoder? By analyzing the speed vs. accuracy tradeoff, we propose strategies to select the optimal stopping time for a decoder for different tasks. We design a protocol to select the decoder that minimizes the spacetime cost per logical gate, for logical computation of a given depth. Our protocol enables comparison of different decoders, and the selection of an appropriate decoder for a given fault-tolerant quantum computing architecture. We illustrate our protocol for the surface code equipped with a desktop implementation of the PyMatching decoder. We estimate PyMatching is fast enough to implement thousands of logical gates with a better accuracy than physical qubits. However, we find it is not sufficiently fast to reach 10^5 logical gates, under certain assumptions, due to the decoding delay which forces qubits to idle and accumulate errors while idling. We expect further improvements to PyMatching are possible by running it on a better machine or by reducing the OS interference.
Fault-tolerant quantum computing is essential for realizing the substantial computational speedups that quantum computing can bring, but it requires real-time error decoding with high performance. Speculative window decoding improves performance by reducing the time spent waiting for dependencies from prior decoding windows.
However, speculative decoders have only been evaluated under the regime of superconducting qubits with fast gate speeds, surface codes, and matching decoders. Since different quantum technologies can have slower gate speeds, we evaluate the performance of speculative decoding under slow gate speeds. We also examine its sensitivity to speculation accuracy, decoder latency, processor count, and workload parallelism, which can vary across different quantum error correction codes, decoders, and hardware platforms.
This work presents design principles for identifying when speculative decoding yields the greatest performance improvements. It also reveals the conditions under which non-speculative decoders outperform speculative decoders.
Quantum computation promises significant computational advantages over classical computation for some problems. However, quantum hardware suffers from much higher error rates than in classical hardware. As a result, extensive quantum error correction is required to execute a useful quantum algorithm. The decoder is a key component of the error correction scheme whose role is to identify errors faster than they accumulate in the quantum computer and that must be implemented with minimum hardware resources in order to scale to the regime of practical applications. In this work, we consider surface code error correction, which is the most popular family of error correcting codes for quantum computing, and we design a decoder micro-architecture for the Union-Find decoding algorithm. We propose a three-stage fully pipelined hardware implementation of the decoder that significantly speeds up the decoder. Then, we optimize the amount of decoding hardware required to perform error correction simultaneously over all the logical qubits of the quantum computer. By sharing resources between logical qubits, we obtain a 67% reduction of the number of hardware units and the memory capacity is reduced by 70%. Moreover, we reduce the bandwidth required for the decoding process by a factor at least 30x using low-overhead compression algorithms. Finally, we provide numerical evidence that our optimized micro-architecture can be executed fast enough to correct errors in a quantum computer.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit.
We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.
Quantum computers promise computational advantages for many important problems across various application domains. Unfortunately, physical quantum devices are highly susceptible to errors that limit us from running most of these quantum applications. Quantum Error Correction (QEC) codes are required to implement Fault-Tolerant Quantum Computers (FTQC) on which computations can be performed without encountering errors. Error decoding is a critical component of quantum error correction and is responsible for transforming a set of qubit measurements generated by the QEC code, called the syndrome, into error locations and error types. For the feasibility of implementation, error decoders must not only identify errors with high accuracy, but also be fast and scalable to a large number of qubits. Unfortunately, most of the prior works on error decoding have focused primarily only on the accuracy and have relied on software implementations that are too slow to be of practical use. Furthermore, these studies only look at designing a single decoder and do not analyze the challenges involved in scaling the storage and bandwidth requirements when performing error correction in large systems with thousands of qubits.In this paper, we present AFS, an accurate, fast, and scalable decoder architecture that is designed to operate in the context of systems with hundreds of logical qubits. We present the hardware implementation of AFS, which is based on the Union Find decoding algorithm and employs a three-stage pipelined design. AFS provides orders of magnitude higher accuracy compared to recent SFQ-based hardware decoders (logical error rate of 6×10−10for physical error rate of 10−3) and low decoding latency (42ns on average), while being robust to measurement errors introduced while extracting syndromes during the QEC cycles. We also reduce the amount of decoding hardware required to perform QEC simultaneously on all the logical qubits by co-designing the micro-architecture across multiple decoding units. Our proposed Conjoined-Decoder Architecture (CDA) reduces the storage overhead by 70% (10MB to 2.8MB). Finally, we reduce the bandwidth overheads required to transmit syndromes from the qubits to the decoders by exploiting the sparsity in the syndromes and compressing the data. Our proposed Syndrome Compression reduces the bandwidth requirement by 30x, on an average.
Quantum error correction (QEC) is essential for scalable quantum computing. However, it requires classical decoders that are fast and accurate enough to keep pace with quantum hardware. While quantum low-density parity-check codes have recently emerged as a promising route to efficient fault tolerance, current decoding algorithms do not allow one to realize the full potential of these codes in practical settings. Here, we introduce a convolutional neural network decoder that exploits the geometric structure of QEC codes, and use it to probe a novel "waterfall" regime of error suppression, demonstrating that the logical error rates required for large-scale fault-tolerant algorithms are attainable with modest code sizes at current physical error rates, and with latencies within the real-time budgets of several leading hardware platforms. For example, for the [144,12,12] Gross code, the decoder achieves logical error rates up to ∼17x below existing decoders - reaching logical error rates ∼10−10 at physical error p=0.1% - with 3-5 orders of magnitude higher throughput. This decoder also produces well-calibrated confidence estimates that can significantly reduce the time overhead of repeat-until-success protocols. Taken together, these results suggest that the space-time costs associated with fault-tolerant quantum computation may be significantly lower than previously anticipated.
Quantum error correction (QEC) represents the cornerstone technology for realizing fault-tolerant quantum computing, addressing the fundamental challenge of quantum state decoherence in noisy intermediate-scale quantum (NISQ) devices. This comprehensive review examines recent advances in QEC implementations from 2020-2024, spanning theoretical foundations to practical hardware demonstrations. We analyze the evolution from pioneering stabilizer codes to modern topological approaches, with particular emphasis on surface codes and low-density parity-check (LDPC) codes that have demonstrated below-threshold error correction in superconducting and trapped-ion systems. The paper provides a comparative analysis of classical and machine learning-based decoder algorithms, evaluating their performance through complexity analysis and threshold comparisons in real-time error correction scenarios. Through examination of breakthrough experiments by Google, IBM, Quantinuum, and emerging platforms, we assess the current state of fault-tolerant quantum computing and identify critical engineering challenges including correlated noise models, cryogenic control systems, and scalable logical gate implementations. Our quantitative analysis reveals that while significant progress has been made toward practical fault-tolerance thresholds, achieving the resource efficiency and reliability required for large-scale quantum computation remains challenging. We provide detailed resource estimates for key applications including Shor's algorithm and optimization problems, along with analysis of industry roadmaps toward thousand-logical-qubit systems. This review serves as a comprehensive guide for researchers and engineers working toward the next generation of fault-tolerant quantum computers, with particular focus on information-theoretic perspectives relevant to quantum information entropy and syndrome processing.