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arXiv:2309.01911 · Japanese Journal of Applied Physics

Quantum circuit distillation and compression

Shunsuke Daimon, Kakeru Tsunekawa, Ryoto Takeuchi, Takahiro Sagawa, Naoki Yamamoto, Eiji Saitoh

Published Feb 15, 2024• 4 citations
arXivHTMLPDF

Abstract

Abstract Quantum coherence in a qubit is vulnerable to environmental noise. When long quantum calculation is run on a quantum processor without error correction, the noise causes fatal errors and messes up the calculation. Here, we propose quantum-circuit distillation to generate quantum circuits that are short but have enough functions to produce an output similar to that of the original circuits. The distilled circuits are less sensitive to the noise and can complete calculation before the quantum coherence is broken. We created a quantum-circuit distillator by building a reinforcement learning model, and applied it to the inverse quantum Fourier transform (IQFT) and Shor’s quantum prime factorization. The obtained distilled circuit allows correct calculation on IBM-Quantum processors. By working with the distillator, we also found a general rule to generate quantum circuits approximating the general n -qubit IQFTs. The quantum-circuit distillator offers a new approach to improve performance of noisy quantum processors.

DOI
10.35848/1347-4065/ad29d8

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Abstract Quantum coherence in a qubit is vulnerable to environmental noise. When long quantum calculation is run on a quantum processor without error correction, the noise causes fatal errors and messes up the calculation. Here, we propose quantum-circuit distillation to generate quantum circuits that are short but have enough functions to produce an output similar to that of the original circuits. The distilled circuits are less sensitive to the noise and can complete calculation before the quantum coherence is broken. We created a quantum-circuit distillator by building a reinforcement learning model, and applied it to the inverse quantum Fourier transform (IQFT) and Shor’s quantum prime factorization. The obtained distilled circuit allows correct calculation on IBM-Quantum processors. By working with the distillator, we also found a general rule to generate quantum circuits approximating the general n -qubit IQFTs. The quantum-circuit distillator offers a new approach to improve performance of noisy quantum processors.
Quantum coherence in a qubit is vulnerable to environmental noise. When long quantum calculation is run on a quantum processor without error correction, the noise causes fatal errors and messes up the calculation. In order to maximize the functionality of quantum computers, it is essential to design quantum circuits that suppress the effects of noise. In this research, we developed a deep reinforcement learning AI that searches for quantum circuits that are less affected by noise. Using the developed AI, we succeeded in generating quantum circuits that achieve quantum Fourier transform while suppressing the effects of noise.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.512.512.5 for N=12N=12N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30N=30N=30 reveal that the optimal depth dmaxd_{\rm max}dmax​ to achieve maximal overall fidelity is independent of system size NNN, suggesting the scalability of our method for large quantum devices in terms of quantum resources.
Virtual distillation is an error-mitigation technique that reduces quantum-computation errors without assuming the noise type. In scenarios where the user of a quantum circuit is required to additionally employ peripherals, such as delay lines, that introduce excess noise, we find that the error-mitigation performance can be improved if the peripheral, whenever possible, is split across the entire circuit, that is, when the noise channel is uniformly distributed in layers within the circuit. We show that under the multiqubit loss and Pauli noise channels, respectively, for a given overall error rate, the average mitigation performance improves monotonically as the noisy peripheral is split (diluted) into more layers, with each layer sandwiched between subcircuits that are sufficiently deep to behave as 2-designs. For both channels, analytical and numerical evidence show that second-order distillation is generally sufficient for (near-)optimal mitigation. We propose an application of these findings in designing a quantum-computing cluster that houses realistic noisy intermediate-scale quantum circuits that may be shallow in depth, where measurement detectors are limited and delay lines are necessary to queue output qubits from multiple circuits.
Recent assertions of a potential advantage of Quantum Neural Network (QNN) for specific Machine Learning (ML) tasks have sparked the curiosity of a sizable number of application researchers. The parameterized quantum circuit (PQC), a major building block of a QNN, consists of several layers of single-qubit rotations and multi-qubit entanglement operations. The optimum number of PQC layers for a particular ML task is generally unknown. A larger network often provides better performance in noiseless simulations. However, it may perform poorly on hardware compared to a shallower network. Because the amount of noise varies amongst quantum devices, the optimal depth of PQC can vary significantly. Additionally, the gates chosen for the PQC may be suitable for one type of hardware but not for another due to compilation overhead. This makes it difficult to generalize a QNN design to wide range of hardware and noise levels. An alternate approach is to build and train multiple QNN models targeted for each hardware which can be expensive. To circumvent these issues, we introduce the concept of knowledge distillation in QNN using approximate synthesis. The proposed approach will create a new QNN network with (i) a reduced number of layers or (ii) a different gate set without having to train it from scratch. Training the new network for a few epochs can compensate for the loss caused by approximation error. Through empirical analysis, we demonstrate ≈71.4% reduction in circuit layers, and still achieve ≈16.2% better accuracy under noise.
Generating quantum entanglement is plagued by decoherence. Distillation and error-correction are employed against such noise, but designing a good distillation circuit, especially on today’s imperfect hardware, is challenging. We develop a simulation algorithm for distillation circuits with per-gate complexity of O(1){\mathcal{O}}(1)O(1) , drastically faster than O(N){\mathcal{O}}(N)O(N) Clifford simulators or O(2N){\mathcal{O}}({2}^{N})O(2N) wavefunction simulators over N qubits. This simulator made it possible to optimize distillation circuits much larger than previously feasible. We design distillation circuits from n raw Bell pairs to k purified pairs and study the use of these circuits in the teleportation of logical qubits. The resulting purification circuits are the best-known for finite-size noisy hardware and can be fine-tuned for specific error-models. Furthermore, we design purification circuits that shape the correlations of errors in the purified pairs such that the performance of potential error-correcting codes is greatly improved.
Virtual distillation is a technique that aims to mitigate errors in noisy quantum computers. It works by preparing multiple copies of a noisy quantum state, bridging them through a circuit, and conducting measurements. As the number of copies increases, this process allows for the estimation of the expectation value with respect to a state that approaches the ideal pure state rapidly. However, virtual distillation faces a challenge in realistic scenarios: preparing multiple copies of a quantum state and bridging them through a circuit in a noisy quantum computer will significantly increase the circuit size and introduce excessive noise, which will degrade the performance of virtual distillation. To overcome this challenge, we propose an error mitigation strategy that uses circuit-cutting technology to cut the entire circuit into fragments. With this approach, the fragments responsible for generating the noisy quantum state can be executed on a noisy quantum device, while the remaining fragments are efficiently simulated on a noiseless classical simulator. By running each fragment circuit separately on quantum and classical devices and recombining their results, we can reduce the noise accumulation and enhance the effectiveness of the virtual distillation technique. Our strategy has good scalability in terms of both runtime and computational resources. We demonstrate our strategy’s effectiveness through noisy simulation and experiments on a real quantum device.