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arXiv:2308.05071 · Quantum

Benchmarking a trapped-ion quantum computer with 30 qubits

Jwo-Sy Chen, Erik Nielsen, Matthew Ebert, I. V. Inlek, Kenneth Wright, Vandiver L. Chaplin, Andrii Maksymov, Eduardo Javier Paez, Amrit Poudel, Peter Maunz, John King Gamble

Published Nov 7, 2024• 103 citations
arXivHTMLPDF

Abstract

Quantum computers are rapidly becoming more capable, with dramatic increases in both qubit count \cite{kim2023evidence} and quality \cite{moses2023race}. Among different hardware approaches, trapped-ion quantum processors are a leading technology for quantum computing, with established high-fidelity operations and architectures with promising scaling. Here, we demonstrate and thoroughly benchmark the IonQ Forte system: configured as a single-chain 30-qubit trapped-ion quantum computer with all-to-all operations. We assess the performance of our quantum computer operation at the component level via direct randomized benchmarking (DRB) across all 30 choose 2 = 435 gate pairs. We then show the results of application-oriented \cite{IonQ_AQ20_2022}\cite{qedcPeerReviewed} benchmarks and show that the system passes the suite of algorithmic qubit (AQ) benchmarks up to #AQ 29. Finally, we use our component-level benchmarking to build a system-level model to predict the application benchmarking data through direct simulation. While we find that the system-level model correlates with the experiment in predicting application circuit performance, we note quantitative discrepancies indicating significant out-of-model errors, leading to higher predicted performance than what is observed. This highlights that as quantum computers move toward larger and higher-quality devices, characterization becomes more challenging, suggesting future work required to push performance further.

DOI
10.22331/q-2024-11-07-1516

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Quantum computers are rapidly becoming more capable, with dramatic increases in both qubit count \cite{kim2023evidence} and quality \cite{moses2023race}. Among different hardware approaches, trapped-ion quantum processors are a leading technology for quantum computing, with established high-fidelity operations and architectures with promising scaling. Here, we demonstrate and thoroughly benchmark the IonQ Forte system: configured as a single-chain 30-qubit trapped-ion quantum computer with all-to-all operations. We assess the performance of our quantum computer operation at the component level via direct randomized benchmarking (DRB) across all 30 choose 2 = 435 gate pairs. We then show the results of application-oriented \cite{IonQ_AQ20_2022}\cite{qedcPeerReviewed} benchmarks and show that the system passes the suite of algorithmic qubit (AQ) benchmarks up to #AQ 29. Finally, we use our component-level benchmarking to build a system-level model to predict the application benchmarking data through direct simulation. While we find that the system-level model correlates with the experiment in predicting application circuit performance, we note quantitative discrepancies indicating significant out-of-model errors, leading to higher predicted performance than what is observed. This highlights that as quantum computers move toward larger and higher-quality devices, characterization becomes more challenging, suggesting future work required to push performance further.
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Quantum computing represents an exciting frontier in the realm of information processing; it is a promising technology that may provide future advances in a wide range of fields, from quantum chemistry to optimization problems. This thesis discusses experimental results for several quantum algorithms performed on a programmable quantum computer consisting of a linear chain of five or seven trapped 171Yb+ atomic clock ions with long coherence times and high gate fidelities. We execute modular one- and two-qubit computation gates through Raman transitions driven by a beat note between counter-propagating beams from a pulsed laser. The system's individual addressing capability provides arbitrary single-qubit rotations as well as all possible two-qubit entangling gates, which are implemented using a pulse-segmentation scheme. The quantum computer can be programmed from a high-level interface to execute arbitrary quantum circuits, and comes with a toolbox of many important composite gates and quantum subroutines. We present experimental results for a complete three-qubit Grover quantum search algorithm, a hallmark application of a quantum computer with a well-known speedup over classical searches of an unsorted database, and report better-than-classical performance. The algorithm is performed for all 8 possible single-result oracles and all 28 possible two-result oracles. All quantum solutions are shown to outperform their classical counterparts. Performing parallel operations will be a powerful capability as deeper circuits on larger, more complex quantum computers present new challenges. Here, we perform a pair of 2-qubit gates simultaneously in a single chain of trapped ions. We employ a pre-calculated pulse shaping scheme that modulates the phase and amplitude of the Raman transitions to drive programmable high-fidelity 2-qubit entangling gates in parallel by coupling to the collective modes of motion of the ion chain. Ensuring the operation yields only spin-spin interactions between the desired pairs, with neither residual spin-motion entanglement nor crosstalk spin-spin entanglement, is a nonlinear constraint problem, and pulse solutions are found using optimization techniques. As an application, we demonstrate the quantum full adder using a depth-4 circuit requiring the use of parallel 2-qubit operations.
We describe and benchmark a new quantum charge-coupled device (QCCD) trapped-ion quantum computer based on a linear trap with periodic boundary conditions, which resembles a race track.The new system successfully incorporates several technologies crucial to future scalability-including electrode broadcasting, multilayer rf routing, and magneto-optical trap (MOT) loading-while maintaining, and in some cases exceeding, the gate fidelities of previous QCCD systems.The system is initially operated with 32 qubits, but future upgrades will allow for more.We benchmark the performance of primitive operations, including an average state preparation and measurement error of 1.6ð1Þ × 10 -3 , an average single-qubit gate infidelity of 2.5ð3Þ × 10 -5 , and an average two-qubit gate infidelity of 1.84ð5Þ × 10 -3 .The systemlevel performance of the quantum processor is assessed with mirror benchmarking, linear cross-entropy benchmarking, a quantum volume measurement of QV ¼ 2 16 , and the creation of 32-qubit entanglement in a GHZ state.We also tested application benchmarks, including Hamiltonian simulation, QAOA, error correction on a repetition code, and dynamics simulations using qubit reuse.We also discuss future upgrades to the new system aimed at adding more qubits and capabilities.
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence and connectivity. However, current TI systems are small in size, with 5-20 qubits and typically use a single trap architecture which has fundamental scalability limitations. To progress towards the next major milestone of 50-100 qubit TI devices, a modular architecture termed the Quantum Charge Coupled Device (QCCD) has been proposed. In a QCCD-based TI device, small traps are connected through ion shuttling. While the basic hardware components for such devices have been demonstrated, building a 50-100 qubit system is challenging because of a wide range of design possibilities for trap sizing, communication topology and gate implementations and the need to match diverse application resource requirements.Towards realizing QCCD-based TI systems with 50-100 qubits, we perform an extensive application-driven architectural study evaluating the key design choices of trap sizing, communication topology and operation implementation methods. To enable our study, we built a design toolflow which takes a QCCD architecture's parameters as input, along with a set of applications and realistic hardware performance models. Our toolflow maps the applications onto the target device and simulates their execution to compute metrics such as application run time, reliability and device noise rates. Using six applications and several hardware design points, we show that trap sizing and communication topology choices can impact application reliability by up to three orders of magnitude. Microarchitectural gate implementation choices influence reliability by another order of magnitude. From these studies, we provide concrete recommendations to tune these choices to achieve highly reliable and performant application executions. With industry and academic efforts underway to build TI devices with 50-100 qubits, our insights have the potential to influence QC hardware in the near-future and accelerate the progress towards practical QC systems.
Emergent quantum computing technologies are widely expected to provide novel approaches in the simulation of quantum chemistry. Despite rapid improvements in the scale and fidelity of quantum computers, high resource requirements make the execution of quantum chemistry experiments challenging. Typical experiments are limited in the number of qubits used, incur a substantial shot cost, or require complex architecture-specific optimization and error mitigation techniques. In this paper, we propose a conceptually simple benchmarking approach involving the use of multi-ancilla quantum phase estimation. Our approach is restricted to very small chemical systems, and does not scale favorably beyond molecular systems that can be described with 222 qubits; however, this restriction allows us to generate circuits that scale quadratically in gate count with the number of qubits in the readout register. This enables the execution of quantum chemistry circuits that act on many qubits, while producing meaningful results with limited shot counts. We use this technique (with 200200200 shots per experiment) to calculate the ground state energy of molecular hydrogen to 505050 bits of precision (8.9×10−168.9 \times 10^{-16}8.9×10−16 hartree) on a 565656-qubit trapped-ion quantum computer, negating Trotter error. Including Trotter error, we obtain between 323232 and 363636 bits of precision (1.5∗10−101.5 * 10^{-10}1.5∗10−10 and 6.0∗10−116.0 * 10^{-11}6.0∗10−11 hartree respectively), vastly exceeding chemical accuracy (1.6∗10−31.6 * 10^{-3}1.6∗10−3 hartree) against Full Configuration Interaction. We consider application of the approach to deeper circuits, and discuss potential as a benchmark task for near-term quantum devices.
Quantum computers promise to solve certain problems more efficiently than their digital counterparts. A major challenge towards practically useful quantum computing is characterizing and reducing the various errors that accumulate during an algorithm running on large-scale processors. Current characterization techniques are unable to adequately account for the exponentially large set of potential errors, including cross-talk and other correlated noise sources. Here we develop cycle benchmarking, a rigorous and practically scalable protocol for characterizing local and global errors across multi-qubit quantum processors. We experimentally demonstrate its practicality by quantifying such errors in non-entangling and entangling operations on an ion-trap quantum computer with up to 10 qubits, and total process fidelities for multi-qubit entangling gates ranging from [Formula: see text] for 2 qubits to [Formula: see text] for 10 qubits. Furthermore, cycle benchmarking data validates that the error rate per single-qubit gate and per two-qubit coupling does not increase with increasing system size.