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arXiv:2210.04330

Benchmarking multi-qubit gates -- I: Metrological aspects

Bharath Hebbe Madhusudhana

Published Oct 9, 2022• 0 citations
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Abstract

Accurate and precise control of large quantum systems is paramount to achieve practical advantages on quantum devices. Therefore, benchmarking the hardware errors in quantum computers has drawn significant attention lately. Existing benchmarks for digital quantum computers involve averaging the global fidelity over a large set of quantum circuits and are therefore unsuitable for specific multi-qubit gates used in analog quantum operations. Moreover, average global fidelity is not the optimal figure-of-merit for some of the applications specific to multi-qubit gates and analog devices , such as the study of many-body physics, which often use local observables. In this two-part paper, we develop a new figure-of-merit suitable for multi-qubit quantum gates based on the reduced Choi matrix of the operation. In the first part, we develop an efficient, scalable protocol to completely characterize the reduced Choi matrix. We identify two sources of sampling errors in measurements of the reduced Choi matrix and we show that there are fundamental limits to the rate of convergence of the sampling errors, analogous to the standard quantum limit and Heisenberg limit. A slow convergence rate of sampling errors would mean that we need a large number of experimental shots. We develop protocols using quantum information scrambling, which has been observed in disordered systems for e.g., to speed up the rate of convergence of the sampling error at state preparation Moreover, we develop protocols using squeezed and entangled initial states to enhance the convergence rate of the sampling error at measurement, which results in a metrologically enhanced reduced process tomography protocol.

DOI
10.48550/arxiv.2210.04330

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•Jul 9, 2021•0 citations
Accurate and precise control of large quantum systems is paramount to achieve practical advantages on quantum devices. Therefore, benchmarking the hardware errors in quantum computers has drawn significant attention lately. Existing benchmarks for digital quantum computers involve averaging the global fidelity over a large set of quantum circuits and are therefore unsuitable for specific multi-qubit gates used in analog quantum operations. Moreover, average global fidelity is not the optimal figure-of-merit for some of the applications specific to multi-qubit gates and analog devices , such as the study of many-body physics, which often use local observables. In this two-part paper, we develop a new figure-of-merit suitable for multi-qubit quantum gates based on the reduced Choi matrix of the operation. In the first part, we develop an efficient, scalable protocol to completely characterize the reduced Choi matrix. We identify two sources of sampling errors in measurements of the reduced Choi matrix and we show that there are fundamental limits to the rate of convergence of the sampling errors, analogous to the standard quantum limit and Heisenberg limit. A slow convergence rate of sampling errors would mean that we need a large number of experimental shots. We develop protocols using quantum information scrambling, which has been observed in disordered systems for e.g., to speed up the rate of convergence of the sampling error at state preparation Moreover, we develop protocols using squeezed and entangled initial states to enhance the convergence rate of the sampling error at measurement, which results in a metrologically enhanced reduced process tomography protocol.
An important step in developing multi-qubit gates is to construct efficient benchmarking protocols for them. In our previous paper (arXiv: 2210.04330), we developed metrological protocols to measure the reduced Choi matrix i.e., the completely positive (CP) maps induced on a subset S of the qubits, by the multi-qubit gate. Here, we show a set of classically verifiable properties that the Choi matrix satisfies if it is a reduction of a multi-qubit unitary and use them to develop benchmarks. We identify three types of errors that affect the implementation of a multi-qubit unitary, based on their mathematical properties and physical origin. Although a target multi-qubit gate is a unitary operator, errors turn it into a general completely positive (CP) map. Errors due to coupling to a thermal bath result in the multi-qubit gate being CP-divisible (Markovian), deviating from a unitary. The reduced Choi matrix of a multi-qubit gate has a property known as double stochasticity, which is violated in the presence of Markovian errors. We construct a benchmark using double-stochasticity violation and show that it is sensitive to coupling to any thermal bath at a finite temperature. Further, errors due to shot-to-shot fluctuations result in a non-markovian, i.e., CP-indivisible quantum process. We prove a new property, which we call the \rank property of the reduced Choi matrix, the violation of which implies a CP-indivisible error. A third category of errors comes from systematics in the implementation of a multi-qubit gate, resulting in no deviation from unitarity. We refer to this as unitary errors. This corresponds to the most challenging type of error to benchmark. We develop a partial-benchmarking protocol for such errors using symmetries of the multi-qubit gate being applied.
With the development of controllable quantum systems, fast and practical characterization of multi-qubit gates has become essential for building high-fidelity quantum computing devices. The usual way to fulfill this requirement via randomized benchmarking demands complicated implementation of numerous multi-qubit twirling gates. How to efficiently and reliably estimate the fidelity of a quantum process remains an open problem. This work thus proposes a character-cycle benchmarking protocol and a character-average benchmarking protocol using only local twirling gates to estimate the process fidelity of an individual multi-qubit operation. Our protocols were able to characterize a large class of quantum gates including and beyond the Clifford group via the local gauge transformation, which forms a universal gate set for quantum computing. We demonstrated numerically our protocols for a non-Clifford gate—controlled- ( T X ) and a Clifford gate—five-qubit quantum error-correcting encoding circuit. The numerical results show that our protocols can efficiently and reliably characterize the gate process fidelities. Compared with the cross-entropy benchmarking, the simulation results show that the character-average benchmarking achieves three orders of magnitude improvements in terms of sampling complexity.
Quantum computers promise to solve certain problems more efficiently than their digital counterparts. A major challenge towards practically useful quantum computing is characterizing and reducing the various errors that accumulate during an algorithm running on large-scale processors. Current characterization techniques are unable to adequately account for the exponentially large set of potential errors, including cross-talk and other correlated noise sources. Here we develop cycle benchmarking, a rigorous and practically scalable protocol for characterizing local and global errors across multi-qubit quantum processors. We experimentally demonstrate its practicality by quantifying such errors in non-entangling and entangling operations on an ion-trap quantum computer with up to 10 qubits, and total process fidelities for multi-qubit entangling gates ranging from [Formula: see text] for 2 qubits to [Formula: see text] for 10 qubits. Furthermore, cycle benchmarking data validates that the error rate per single-qubit gate and per two-qubit coupling does not increase with increasing system size.
As quantum devices make steady progress towards intermediate scale and fault-tolerant quantum computing, it is essential to develop rigorous and efficient measurement protocols that account for known sources of noise. Most existing quantum characterization protocols such as gate-set tomography and randomized benchmarking assume the noise acting on the qubits is Markovian. However, this assumption is often not valid, as for the case of 1/f charge noise or hyperfine nuclear spin noise. Here, we present a general framework for quantum process tomography (QPT) in the presence of time-correlated noise. We further introduce fidelity benchmarks that quantify the relative strength of different sources of Markovian and non-Markovian noise. As an application of our method, we perform a comparative theoretical and experimental analysis of silicon spin qubits. We first develop a detailed noise model that accounts for the dominant sources of noise and validate the model against experimental data. Applying our framework for time-correlated QPT, we find that the number of independent parameters needed to characterize one- and two-qubit gates can be compressed by 10× and 100× , respectively, when compared to the fully generic case. These compressions reduce the amount of tomographic measurements needed in experiment, while also significantly speeding up numerical simulations of noisy quantum circuit dynamics compared to time-dependent Hamiltonian simulation. Using this compressed noise model, we find good agreement between our theoretically predicted process fidelities and two-qubit interleaved randomized benchmarking fidelities of 99.8% measured in recent experiments on silicon spin qubits. More broadly, our formalism can be directly extended to develop efficient and scalable tuning protocols for high-fidelity control of large arrays of quantum devices with non-Markovian noise. Published by the American Physical Society 2024
The calibration of high-quality two-qubit entangling gates is an essential component in engineering large-scale, fault-tolerant quantum computers. However, many standard calibration techniques are based on randomized circuits that are only quadratically sensitive to calibration errors. As a result, these approaches are inefficient, requiring many experimental shots to achieve acceptable performance. In this work, we demonstrate that robust phase estimation can enable high-precision, Heisenberg-limited estimates of coherent errors in multi-qubit gates. Equipped with an efficient estimator, the calibration problem may be reduced to a simple optimization loop that minimizes the estimated coherent error. We experimentally demonstrate our calibration protocols by improving the operation of a two-qubit controlled-Z gate on a superconducting processor, and we validate the improved performance with gate set tomography. Our methods are applicable to gates in other quantum hardware platforms such as ion traps and neutral atoms, and on other multi-qubit gates, such as CNOT or iSWAP.
Quantum computers have the potential to bring about a new age of technology, but in order for them to become a reality, the elephant in the room must be addressed, quantum errors. The complexity of quantum errors grows exponentially as the system size is increased; scalable characterization protocols which work under physically realistic noise are therefore needed to assess and optimize control. \n \nRandomized Benchmarking (RB) is a family of characterization protocols with the requisite qualities. RB protocols are independent of state preparation and measurement (SPAM) errors, and because they extract partial information about the error profiles in the form of figures of merit, they are scalable in the number of qubits. In this thesis, we study these figures of merit under various error models, gate-sets, and sample distributions, to further our understanding of their physical meaning, and to fine-tune the best practice for diagnosing errors in basic gate-sets. \n \nThe first study presented in this thesis looks at the physical meaning of the unitarity under physically realistic gate-dependent noise. Numerically, we demonstrate that under these realistic noise models, the unitarity obtained via Extended RB (XRB) overlaps strongly with the average of the unitarity of the errors over the set of individual operations. \n \nThe second study numerically and analytically proves that the Standard RB (SRB) decay parameter p coincides with the decay parameter of the novel figure of merit gate-set circuit fidelity. We also prove that, in the limit of high-fidelity single-qubit experiments, the disconnect between the average gate fidelity and SRB experimental results is caused by a basis mismatch between the gates and the state-preparation and measurement procedures. \n \nIn the third part of this thesis, we compare the results of two variations of the SRB protocol, one that samples uniformly (SRB) and one that samples non-uniformly (NIST RB) from the Clifford group. We prove that NIST RB produces an exponential fidelity curve that gives different infidelity results than SRB. \n \nThe fourth and final study gives a standard for assessing basic gate-sets. Experimental results are given from the assessment run on super-conducting and ion-trap devices. We also experimentally show how the systematic error bounds can be tightened by accounting for the error's degree of coherence, as well as using weaker randomizing sets.