We demonstrate the applicability of a universal gate set in the parity encoding, which is a dual to the standard gate model, by exploring several quantum gate algorithms such as the quantum Fourier transform and quantum addition. Embedding these algorithms in the parity encoding reduces the circuit depth compared to conventional gate-based implementations while keeping the multiqubit gate counts comparable. We further propose simple implementations of multiqubit gates in tailored encodings and an efficient strategy to prepare graph states.
We demonstrate the applicability of a universal gate set in the parity encoding, which is a dual to the standard gate model, by exploring several quantum gate algorithms such as the quantum Fourier transform and quantum addition. Embedding these algorithms in the parity encoding reduces the circuit depth compared to conventional gate-based implementations while keeping the multiqubit gate counts comparable. We further propose simple implementations of multiqubit gates in tailored encodings and an efficient strategy to prepare graph states.
We propose a universal gate set for quantum computing with all-to-all connectivity and intrinsic robustness to bit-flip errors based on parity encoding. We show that logical controlled phase gate and R_{z} rotations can be implemented in parity encoding with single-qubit operations. Together with logical R_{x} rotations, implemented via nearest-neighbor controlled-NOT gates and an R_{x} rotation, these form a universal gate set. As the controlled phase gate requires only single-qubit rotations, the proposed scheme has advantages for several cornerstone quantum algorithms, e.g., the quantum Fourier transform. We present a method to switch between different encoding variants via partial on-the-fly encoding and decoding.
In parity quantum computing, multiqubit logical gates are implemented by single-qubit rotations on a suitably encoded state involving auxiliary qubits. Consequently, there is a correspondence between qubit count and the size of the native gate set. One might then wonder, what is the smallest number of auxiliary qubits that still allows for universal parity computing? Here, we demonstrate that the answer is 1 if the number of logical qubits is even, and 2 otherwise. Furthermore, we present a sufficient condition for a given parity gate set to be universal. This leads to a variety of different universal parity gate sets corresponding to different numbers of auxiliary qubits and more generally contributes to the understanding of which entangling gates are required to augment the set of single-qubit unitaries to perform universal quantum computing. As a consequence, we obtain (i) minimal implementations of the parity framework on, e.g., a triangular lattice, (ii) hardware-specific implementations of the parity flow framework on, e.g., a heavy-hex lattice, and (iii) novel universal resources for measurement-based quantum computation.
We present an efficient implementation of the Parity Architecture for neutral-atom quantum processors. We adapt Parity Twine Networks (PTNs) to different atom layouts, native entangling gates, and atom-shuttling capabilities. This provides a general framework for hardware-aware optimization of gate count, circuit depth, and atom transport for quantum circuits encoding arbitrary interaction graphs in a common basis. Specifically, we develop PTN constructions based on different native entangling-gate realizations, namely CZ, CZSWAP, and iSWAP, providing flexibility to accommodate different hardware capabilities on both static and mobile neutral-atom platforms. Using the quantum Fourier transform (QFT) as a representative example, we demonstrate substantial reductions in two-qubit gate count, atom transport, and circuit depth. These resource savings translate into an estimated circuit fidelity three orders of magnitude higher than competing compilation strategies for a 30-qubit QFT. We further extend the construction to the recently introduced optimistic QFT and discuss the broader applicability of PTNs to other quantum algorithms on neutral-atom platforms.
One of the main challenges the implementation of quantum optimization algorithms has been facing in the last year is the connectivity of qubits on quantum chips. The parity architecture has emerged as an approach to address this issue by trading qubit connectivity for an overhead in the number of physical qubits by encoding the parity of logical qubits. This qubit overhead comes with so-called parity constraints that can be implemented geometrically locally on the quantum chip. While the parity architecture is suitable for both analog and digital quantum computing, we focus on the digital side in this thesis, and present new insights on the parity approach from two perspectives. First, we investigate its resource requirements for quantum optimization, in particular for the Quantum Approximate Optimization Algorithm (QAOA), and propose a constructive algorithm to reduce these requirements compared to previous strategies. In addition, by viewing the parity constraints as stabilizers, we introduce a strategy to conserve the parity constraints throughout the execution of the QAOA. This is in contrast to previous work on the parity architecture, where the parity constraints were typically enforced via additional energy penalties. Second, we show how the parity framework can be used for universal quantum computation, and how cornerstone algorithms like the quantum Fourier transform benefit from this new approach. Our method essentially allows to trade a high circuit-depth for a qubit overhead, while at the same time offering more flexibility in circuit design by enabling on-the-fly recoding of physical qubits. Furthermore, we present a universal quantum computing approach in the parity architecture based on quantum measurements, which allows for additional reductions in circuit depth. Finally, we outline how the parity architecture can be exploited for quantum error correction. With these findings, we aim to contribute to building the bridge between the current era of non-error-corrected hardware and fault-tolerant quantum computing.
We present a protocol to encode and decode arbitrary quantum states in the parity architecture with constant circuit depth using measurements, local nearest-neighbor and single-qubit operations only. While this procedure typically requires a quadratic overhead of simultaneous qubit measurements, it allows for a simple and low-depth implementation of logical multi-qubit gates in the parity encoding via code deformation. We discuss how such encoding and decoding schemes can be used to flexibly change the size and shape of the underlying code to enable a more efficient implementation of quantum gates or algorithms. We apply the new findings to the QAOA which leads to a constant depth implementation using local gates at the same optimization performance as the standard, potentially non-local, QAOA approach without the parity encoding. Furthermore, we show that our method can reduce the depth of implementing the quantum Fourier transform by a factor of two when allowing measurements.